IP Core Migration for IC Control Block Size Reduction
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Solution Overview
Problem
The existing programmable logic devices (PLDs) face an issue where unused intellectual property (IP) cores occupy significant device area, leading to increased fabrication costs due to their hardwired nature in the control circuitry, even when not in use.
Innovation Solution
A method is introduced to migrate unused controller-based IP cores from the control circuitry to the core logic circuit, allowing them to be configured as soft IP cores, thereby reducing the control block size and fabrication costs. This involves using a logic design system to generate configuration data that enables the conversion of hard IP cores to soft IP cores during device initialization, utilizing electronic design automation tools to analyze and reconfigure IP cores.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If IP cores are hardwired in the control circuitry, then the controller can provide various device features, but the device area increases due to unused IP cores permanently existing in the controller
Solution Approach 1:
The patent applies dynamics by making the IP core configuration dynamic rather than static. The controller can load different IP core configurations from external memory based on operational requirements, allowing the system to adapt its functionality dynamically. This resolves the contradiction by enabling versatile device features only when needed, rather than permanently allocating space for all possible IP cores.
Solution Approach 2:
The patent extracts the IP core configuration data from the physical controller circuitry and stores it externally in memory. The controller contains only the mechanism to load and execute IP core configurations, while the actual IP core implementations reside externally. This extraction reduces the controller's physical area while maintaining the ability to provide various device features through selective loading of IP core configurations.
2Adaptability or versatility
If IP cores are included in the controller to support various device features, then the controller functionality is enhanced, but the fabrication cost increases due to larger device area
Solution Approach 1:
The patent extracts IP core configurations from the controller's physical implementation and stores them externally in memory devices. The controller contains only the minimal logic to load, initialize, and execute IP core configurations from external storage. This significantly reduces the controller's area, thereby reducing fabrication costs while maintaining enhanced functionality through selective loading of IP cores based on operational needs.
Solution Approach 2:
The patent changes the parameter of IP core implementation from hardwired physical circuits to software-based configurations stored in memory. This parameter change allows the same physical controller to support multiple different IP core implementations by loading different configuration data, thereby reducing fabrication costs while maintaining versatile functionality.
3Reliability
If unused IP cores are permanently present in the controller, then the controller is prepared for various operations, but the device area is wasted when IP cores are disabled
Solution Approach 1:
The patent implements dynamic configuration loading where the controller loads only the IP cores that are currently needed for operation from external memory. The system maintains operation readiness by能够快速加载所需的IP核心配置，而不需要永久保留所有可能的IP核心实例。这种动态方法在保证可靠性的同时显著减少了设备面积。
Solution Approach 2:
The patent uses configuration data copies stored in external memory to represent IP core implementations. Instead of having physical IP core circuits permanently built into the controller, the controller loads configuration copies from external storage when needed. This copying approach maintains operational readiness while eliminating the need to permanently allocate physical space for unused IP cores.
Data Source
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AI summary
Methods for control block size reduction through intellectual property (IP) migration in an integrated circuit (IC) device are disclosed. A disclosed method includes receiving configuration data for the IC device and determining whether IP construction data is defined in the configuration data. The IP construction data may contain instruction sets for implementing logical operations of a controller-based IP core in a core region of the IC device. Such data creates flexibility to configure the controller-based IP core in the core logic circuit as a soft IP core, when required. In this scenario, the controller-based IP core can be removed from the controller of the IC device during device fabrication. As a result, the footprint (e.g., area) of the controller of the IC device can be reduced, which subsequently increases cost-savings for the IC fabrication.