IPD Capacitor Grounded TSV Layout for Shorter Signal Paths

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Solution Overview

Problem

Three-dimensional semiconductor devices face challenges related to increased electrical loss and signal delays due to longer electrical pathways, which are not adequately addressed by existing packaging technologies.

Innovation Solution

The integration of a through-substrate-via in the integrated passive device (IPD) provides a common electrical ground connection on both sides of the IPD, allowing direct electrical connections to an interposer and a package substrate, thereby reducing electrical pathways to shorter lengths and minimizing RC time constants.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If three-dimensional semiconductor devices are used to improve integration density and bandwidth, then integration density and bandwidth are improved, but electrical loss and signal delays increase due to longer electrical pathways

Engineering Contradiction:

Improveintegration densityVSAvoidelectrical loss

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The patent introduces through-substrate-vias that extend vertically through the substrate, transforming the electrical connection from a planar two-dimensional path to a three-dimensional structure. This allows direct vertical connections between stacked chips and the substrate, significantly shortening the electrical pathway length and reducing RC time constants while maintaining high integration density

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The through-substrate-via acts as an intermediary element that provides a direct conductive pathway through the substrate, mediating the electrical connection between the stacked chips and the package substrate. This intermediary structure eliminates the need for long lateral interconnect paths through the substrate, thereby reducing electrical loss and signal delays

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If three-dimensional semiconductor devices are used to improve integration density and bandwidth, then integration density and bandwidth are improved, but signal delays increase due to longer electrical pathways

Engineering Contradiction:

ImprovebandwidthVSAvoidsignal delays

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The through-substrate-vias create vertical three-dimensional electrical pathways that directly connect stacked chips to the package substrate, bypassing long lateral signal routes. This dimensional change in signal path architecture significantly reduces propagation delay and RC time constants, enabling faster signal transmission while maintaining high bandwidth capability

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If conventional packaging technologies are used, then manufacturing simplicity is maintained, but electrical pathways are longer causing increased electrical loss and signal delays

Engineering Contradiction:

Improvemanufacturing simplicityVSAvoidelectrical loss

Core Design Contradiction:

Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent segments the electrical connection path by introducing discrete through-substrate-via structures that create dedicated vertical conduits through the substrate. This segmentation allows independent optimization of the electrical pathway, enabling short vertical connections that reduce electrical loss while maintaining compatibility with conventional packaging manufacturing processes

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS20250357296A1Capacitor integrated passive device with common grounded through-substrate-via and substrate backside conductor and methods of forming the same

Publication Date: 2025.11.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

An embodiment integrated passive device may include a substrate, a deep trench capacitor formed within the substrate, electrical interconnect structures formed on a first side of the substrate and electrically connected to the deep trench capacitor, and an electrically conducting through-substrate-via formed within the substrate and extending from the first side of the substrate to a second side of the substrate and electrically connected to one or more of the electrical interconnect structures formed on the first side of the substrate. The electrical interconnect structures may be connected to one or more power terminals and to one or more ground terminals of the deep trench capacitor, and the through-substrate-via may be electrically connected to the second interconnects on the first side of the substrate. The integrated passive device may further include an electrical contact structure formed on the second side of the substrate that is electrically connected to the through-substrate-via.