IPD and Conductive Trace Harmonic Suppression in Power Amplifier Modules

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Solution Overview

Problem

Miniaturization of power amplifier modules for mobile devices is hindered by geometrical limitations and inefficiencies in implementing harmonic frequency suppression, particularly in multi-frequency band support, due to challenges in realizing large inductance values and achieving adequate harmonic rejection with traditional integration methods.

Innovation Solution

Incorporating an integrated passive device (IPD) on a silicon die connected via a conductive trace in a laminate substrate, where the trace provides inductive impedance and resonates capacitors at specific harmonic frequencies, forming a matching network that suppresses harmonics and enables impedance transformation and filtering.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If traditional integration methods are used to implement harmonic frequency suppression, then the power amplifier module size can be reduced, but the ability to achieve adequate harmonic rejection and support multi-frequency bands deteriorates due to geometrical limitations and inefficiencies in realizing large inductance values

Engineering Contradiction:
Improvepower amplifier module sizeVSAvoidharmonic rejection capability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent transitions from planar integration to three-dimensional vertical stacking, placing the power amplifier die and IPD die at different heights on the packaging substrate. This vertical arrangement allows for adequate harmonic rejection and multi-frequency band support while maintaining compact module size, overcoming the geometrical limitations of traditional planar integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements a nested structure where the IPD die containing passive impedance elements is integrated within the packaging substrate that also hosts the power amplifier die. The conductive traces and ground planes are layered vertically, creating a compact nested arrangement that provides sufficient electrical performance while minimizing overall module volume.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Ease of manufacture

If traditional integration methods are used, then manufacturing simplicity is maintained, but the efficiency and insertion loss performance deteriorate due to inability to achieve adequate harmonic rejection

Engineering Contradiction:
Improveintegration process simplicityVSAvoidinsertion loss
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent divides the power amplifier module into separate functional segments: a power amplifier die for signal amplification and an IPD die for harmonic suppression and impedance matching. This segmentation allows each component to be optimized independently while maintaining manufacturing simplicity through standard packaging substrate integration techniques.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a packaging substrate with conductive traces and ground planes as an intermediary between the power amplifier die and the external circuit. This intermediary structure enables adequate harmonic rejection and reduced insertion loss while maintaining ease of manufacture through standardized substrate fabrication processes.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of moving object

If planar integration is used, then device area is minimized, but the capability to provide adequate harmonic suppression and impedance matching deteriorates due to geometrical constraints

Engineering Contradiction:
Improvedevice footprint areaVSAvoidfrequency band support capability
Core Design Contradiction:
Area of moving objectVSAdaptability or versatility

Solution Approach 1:

The patent employs vertical stacking to transition from two-dimensional planar integration to three-dimensional arrangement. The power amplifier die and IPD die are positioned at different vertical levels, connected through conductive traces and ground planes in the substrate. This approach maintains minimal footprint area while providing adequate harmonic suppression and multi-frequency band support.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent uses a composite structure combining active power amplifier semiconductor die with passive IPD die containing impedance-matching elements. This composite arrangement integrates both amplification and harmonic suppression functions in a compact vertical stack, achieving frequency band versatility without increasing device footprint area.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for compact, efficient harmonic frequency suppression and impedance matching, improving power amplifier efficiency and reducing insertion loss across multiple frequency bands.

Implementation Method 1

A length of the conductive trace together with a capacitance of the integrated passive device can suppress the harmonic frequency of the radio frequency signal

Methodology Applied
Scientific EffectResonance: Resonance

Implementation Method 2

The conductive trace provides inductive impedance and resonates capacitors at specific harmonic frequencies

Methodology Applied
Scientific EffectInductance: Inductor

Implementation Method 3

The conductive trace can be included in a matching network configured to provide impedance matching

Methodology Applied
Scientific EffectImpedance matching: Electrical Impedance Tomography

Data Source

PatentUS10553570B2Network with integrated passive device and conductive trace in packaging substrate and related modules and devices
Publication Date: 2020.02.04 SKYWORKS SOLUTIONS INC
  • US10553570B2 patent drawing
  • US10553570B2 patent drawing
  • US10553570B2 patent drawing

AI summary

In an embodiment, an apparatus includes a packaging substrate and a die on the packaging substrate. The die includes an integrated passive device and a contact providing an electrical connection to the integrated passive device. A conductive trace of the packaging substrate is in an electrical path between the contact of the die and a ground potential. Such an integrated passive device and conductive trace can be included in a matching network configured to receive an amplified radio frequency signal from a power amplifier, for example. The packaging substrate can be, for example, a laminate substrate.