IPD Integration Beneath Semiconductor Die
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Solution Overview
Problem
Semiconductor devices face challenges in achieving high-quality integrated passive devices (IPDs) with enhanced interconnect capabilities, particularly in high-frequency applications where they are susceptible to electromagnetic interference (EMI) and radio frequency interference (RFI), and require effective heat dissipation to maintain performance and reliability.
Innovation Solution
A method of manufacturing semiconductor devices involves forming a conductive layer with IPDs beneath a semiconductor die, using an insulating spacer and encapsulant to mount the die, and exposing the conductive layer for direct connection to external devices, which enhances interconnectivity, reduces interference, and improves heat dissipation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If IPDs are integrated within the semiconductor device, then interconnect capability is improved, but susceptibility to EMI and RFI increases
Solution Approach 1:
The patent positions IPDs in the vertical dimension beneath the semiconductor die rather than integrating them laterally within the die. This dimensional relocation allows IPDs to maintain interconnect capability while physically separating them from sensitive circuit elements, thereby reducing susceptibility to EMI and RFI.
Solution Approach 2:
The patent segments the semiconductor device into distinct functional layers: active circuit elements on the die, IPDs beneath the die, and encapsulant surrounding both. This segmentation isolates IPDs from electromagnetic interference affecting the active circuits while maintaining electrical interconnectivity through controlled vias and conductors.
2Area of stationary object
If IPDs are placed beneath the semiconductor die, then device footprint is reduced, but heat dissipation becomes more challenging
Solution Approach 1:
The patent employs an encapsulant layer that serves as a thermal management interface. This encapsulant is configured to conduct heat away from both the semiconductor die and underlying IPDs, effectively addressing thermal dissipation challenges while maintaining the compact vertical architecture that reduces footprint.
3Adaptability or versatility
If multiple IPDs are integrated in one semiconductor package, then interconnect capability is enhanced, but device complexity increases
Solution Approach 1:
The patent creates a universal platform architecture where the substrate, encapsulant, and interconnect structures serve multiple functions simultaneously: mechanical support, electrical interconnection, thermal management, and electromagnetic shielding. This multi-functionality enables multiple IPDs to be integrated without proportionally increasing overall device complexity.
Data Source
AI summary
A semiconductor device has a conductive layer formed on a substrate. The conductive layer has a first portion constituting contact pads and a second portion constituting an integrated passive device such as an inductor. A spacer is formed on the substrate around the second portion of the conductive layer. The spacer can be insulating material or conductive material for shielding. A semiconductor die is mounted to the spacer. An electrical connection is formed between contact pads on the semiconductor die and the contact pads on the substrate. An encapsulant is formed around the semiconductor die, electrical connections, spacer, and conductive layer. The substrate is removed to expose the conductive layer. An interconnect structure is formed on the backside of the substrate. The interconnect structure is electrically connected to the conductive layer. The semiconductor device can be integrated into a package.