Integrated Passive Device Stack With High Resistivity Substrate
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Solution Overview
Problem
Wireless communication circuits face high loss and limited space due to the incorporation of both active and passive devices on low resistivity substrates, leading to poor quality factor Q and impaired transmit power and receive sensitivity performance.
Innovation Solution
Implementing passive devices in integrated passive devices (IPDs) with high resistivity substrates and stacking them with active devices on dies to form a three-dimensional structure, reducing loss and increasing available space for other devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If both active and passive devices are incorporated on a low resistivity substrate, then device integration is achieved, but loss increases and quality factor Q deteriorates
Solution Approach 1:
The patent divides the circuit into two separate substrates: a first substrate containing active devices and a second substrate containing passive devices. This segmentation allows each substrate to be optimized independently, with the second substrate using high resistivity material to reduce losses associated with passive devices while the first substrate maintains low resistivity for active device performance.
Solution Approach 2:
The patent transitions from a two-dimensional planar integration on a single substrate to a three-dimensional stacked configuration with multiple substrates connected via interposer. This dimensional change enables simultaneous optimization of electrical performance and spatial utilization, placing passive devices on a separate high resistivity substrate above the active devices.
2Device complexity
If both active and passive devices are incorporated on a low resistivity substrate, then device integration is achieved, but quality factor Q deteriorates
Solution Approach 1:
The patent divides the circuit into two separate substrates: a first substrate containing active devices and a second substrate containing passive devices. This segmentation allows each substrate to be optimized independently, with the second substrate using high resistivity material to reduce losses associated with passive devices while the first substrate maintains low resistivity for active device performance.
Solution Approach 2:
The patent applies different substrate resistivity characteristics to different functional regions: the first substrate uses low resistivity material optimized for active devices, while the second substrate uses high resistivity material optimized for passive devices. This local quality differentiation maximizes the performance of each device type in its appropriate electrical environment.
3Loss of energy
If passive devices are implemented on a separate high resistivity substrate, then loss is reduced and quality factor Q improves, but device complexity increases
Solution Approach 1:
The patent combines multiple substrates (first substrate with active devices, second substrate with passive devices, and interposer with pillars) into a single integrated three-dimensional stack. This merging approach consolidates what would otherwise be separate components into one unified structure, reducing the need for external interconnections and packaging complexity.
Solution Approach 2:
The patent transitions from a two-dimensional planar integration on a single substrate to a three-dimensional stacked configuration with multiple substrates connected via interposer. This dimensional change enables simultaneous optimization of electrical performance and spatial utilization, placing passive devices on a separate high resistivity substrate above the active devices.
4Area of stationary object
If a three-dimensional stack structure is formed with separate substrates, then available space for devices increases, but manufacturing complexity increases
Solution Approach 1:
The patent performs preliminary actions by pre-forming pillars with conductive material within the interposer substrate before final assembly. This preliminary preparation of conductive structures simplifies the subsequent bonding process and enables better manufacturing control compared to attempting to form all interconnections after stacking the substrates.
Solution Approach 2:
The patent introduces an interposer substrate as an intermediary component between the first and second substrates. This interposer contains pre-formed pillars that facilitate electrical connections, acting as a mediator that simplifies the overall manufacturing process by providing a standardized interface for bonding the active and passive device substrates.
Data Source
AI summary
A circuit including a first die, an integrated passive device and a second layer. The first die includes a first substrate and active devices. The integrated passive device includes a first layer, a second substrate and passive devices. The second substrate includes vias. The passive devices are implemented at least on the first layer or the second substrate. A resistivity per unit area of the second substrate is greater than a resistivity per unit area of the first substrate. The second layer is disposed between the first die and the integrated passive device. The second layer includes pillars. Each of the pillars connects a corresponding one of the active devices to (i) one of the vias, or (ii) one of the passive devices. The first die, the integrated passive device and the second layer are disposed relative to each other to form a stack.