3D IPD Stacking with High-Resistivity Encapsulant for Interference Reduction
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Solution Overview
Problem
High-frequency semiconductor devices face challenges in reducing inter-device interference and heat dissipation, which increases costs and package size due to the need for high-resistivity substrates and high-temperature processes for forming high-quality integrated passive devices (IPDs).
Innovation Solution
The semiconductor device incorporates a first IPD formed over a high-resistivity encapsulant, with a conductive pillar extending above it, and a second IPD formed opposite the first IPD, separated by the encapsulant to reduce inter-device interference, and includes a heat sink for effective heat dissipation, eliminating the need for a high-cost substrate and optimizing silicon area usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If IPDs are formed side-by-side on the same wafer level, then manufacturing complexity is reduced, but silicon area is consumed and inter-device interference increases
Solution Approach 1:
The patent transitions from a two-dimensional side-by-side arrangement of IPDs on the same wafer level to a three-dimensional stacked configuration where IPDs are formed at different vertical levels separated by high-resistivity encapsulant layers. This dimensional change enables multiple IPDs to coexist in a compact footprint while maintaining electrical isolation and reducing interference.
2Reliability
If a high-resistivity substrate is used for forming high-quality IPDs, then IPD quality is improved, but cost increases
Solution Approach 1:
The patent segments the high-resistivity encapsulant material into discrete layers positioned between individual IPDs or groups of IPDs, rather than requiring a uniformly high-resistivity substrate throughout the entire device. This segmentation allows standard substrates to be used while providing localized high-resistivity isolation where needed, reducing overall material cost while maintaining IPD quality.
3Reliability
If high-temperature processes are used for IPD formation, then IPD quality is improved, but heat dissipation challenges increase
Solution Approach 1:
The patent introduces high-resistivity encapsulant layers as intermediary structures between IPDs that serve dual functions: providing electrical isolation during high-temperature formation processes and acting as thermal management layers during device operation. These encapsulant layers facilitate heat dissipation pathways while maintaining the high-temperature processing needed for quality IPD formation.
4Volume of stationary object
If multiple IPDs are placed close together, then package size is reduced, but inter-device interference increases
Solution Approach 1:
The patent employs high-resistivity encapsulant layers as intermediary structures positioned between closely-spaced IPDs. These encapsulant layers provide electrical isolation that prevents capacitive, inductive, and conductive coupling (cross-talk) between adjacent IPDs, enabling compact package design without suffering from inter-device interference.
5Area of stationary object
If IPDs are vertically stacked over the same region, then silicon area is optimized, but manufacturing complexity increases
Solution Approach 1:
The patent employs a universal high-resistivity encapsulant layer structure that serves multiple functions simultaneously: providing electrical isolation between vertically-stacked IPDs, enabling thermal management, and facilitating standardized manufacturing processes. This multi-functional approach to encapsulation simplifies the overall manufacturing complexity despite the vertical stacking architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration achieves high-quality IPDs with reduced inter-device interference and efficient heat dissipation, leading to smaller, more cost-effective semiconductor packages with improved performance and reliability.
Implementation Method 1
a first integrated passive device (IPD) formed in a first region over a high-resistivity encapsulant... A second IPD is formed over the first encapsulant opposite the first IPD to reduce inter-device interference
Implementation Method 2
includes a heat sink for effective heat dissipation
Data Source
AI summary
A semiconductor device has a first conductive layer formed over a sacrificial substrate. A first integrated passive device (IPD) is formed in a first region over the first conductive layer. A conductive pillar is formed over the first conductive layer. A high-resistivity encapsulant greater than 1.0 kohm-cm is formed over the first IPD to a top surface of the conductive pillar. A second IPD is formed over the encapsulant. The first encapsulant has a thickness of at least 50 micrometers to vertically separate the first and second IPDs. An insulating layer is formed over the second IPD. The sacrificial substrate is removed and a second semiconductor die is disposed on the first conductive layer. A first semiconductor die is formed in a second region over the substrate. A second encapsulant is formed over the second semiconductor die and a thermally conductive layer is formed over the second encapsulant.