Inter-Processor Interrupt Redirection in System Management Mode
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Solution Overview
Problem
Current computer platforms face inefficiencies in processing inter-processor interrupts (IPIs) during System Management Mode (SMM) due to synchronous core synchronization, leading to processing interruptions, especially in many-core environments, where only specific cores need to enter SMM for tasks, while others continue standard operations.
Innovation Solution
Implementing a targeted-core SMM entry/exit model where a core in SMM can respond to IPIs by saving its context, passing control to an OS handler, and enabling interrupt handling, allowing it to perform IPI-related work without impacting non-SMM cores, using redirection logic and interrupt descriptor tables to manage interrupts effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all CPU cores are synchronized to enter SMM, then OS software model compatibility is maintained, but processor efficiency deteriorates due to unnecessary interruptions to cores not requiring SMM tasks
Solution Approach 1:
The patent segments the SMM entry process by core, allowing individual cores to enter SMM independently based on their specific task requirements rather than forcing all cores to synchronize. This is achieved through targeted SMM entry mechanisms where only the core needing SMM services enters the mode while others continue normal operation.
Solution Approach 2:
The patent implements dynamic SMM management where the system can adaptively determine which cores need to enter SMM based on real-time task requirements. The SMM entry/exit state becomes dynamic rather than static, allowing cores to transition in and out of SMM as needed without affecting other cores.
2Reliability
If interrupts are disabled in SMM environment, then SMM task execution is protected, but IPI handling capability is lost causing cores to appear absent and non-responsive
Solution Approach 1:
The patent introduces an intermediary mechanism (interrupt redirection logic) that mediates between IPIs and cores in SMM. When an IPI targets a core in SMM, the interrupt is redirected to an alternative handler that can process the IPI without requiring the target core to exit SMM, thus maintaining both protection and responsiveness.
Solution Approach 2:
The patent replaces the traditional mechanical approach where the targeted core must physically exit SMM to handle IPIs with a software-based interrupt redirection mechanism. This substitution allows IPI handling to occur through alternative pathways while the core remains in its protected SMM state.
3Device complexity
If synchronous SMM entry/exit is implemented, then firmware simplicity is maintained, but Quality-of-Service activities like streaming audio/video experience jitter due to processing interruptions
Solution Approach 1:
The patent segments the SMM management approach by individualizing core entry/exit decisions rather than applying uniform synchronous control to all cores. This segmentation allows time-sensitive QoS activities to continue uninterrupted on cores that don't require SMM tasks.
Solution Approach 2:
The patent applies different operational characteristics to different cores based on their specific requirements. Cores requiring SMM tasks receive enhanced protection and management, while other cores maintain standard operation with no interruptions, optimizing overall system performance for mixed workloads.
Data Source
AI summary
A method, processor, and system are disclosed. In one embodiment method includes a first processor core among several processor cores entering into a system management mode. At least one of the other additional processor cores apart from the first processor core remain operational and do not enter the system management mode. Then, once in the system management mode, the first processor core responds to an inter-processor interrupt.