IPS Array Substrate Common Electrode Gap Design
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Solution Overview
Problem
In-plane switching (IPS) liquid crystal displays face issues with low aperture ratio due to large wiring areas and disordered electric fields at the edge regions of sub-pixels, leading to light leakage and color mixing.
Innovation Solution
The array substrate design includes gate lines, data lines, and common electrodes arranged in specific directions with overlap sections and gaps to rectify the disordered electric field, reducing light leakage and increasing aperture ratios by insulating common electrodes from data lines and gate lines, and positioning gate lines between adjacent common electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If common electrodes are arranged in the same layer as pixel electrodes to form interdigital electrodes, then the IPS liquid crystal display mode can be achieved, but the aperture ratio is reduced due to large wiring areas
Solution Approach 1:
The patent positions common electrodes at the edge regions of sub-pixels rather than in the center, utilizing the peripheral dimension of the pixel structure. This dimensional repositioning allows common electrodes to be placed in previously underutilized spaces, reducing their interference with the central pixel electrode area and thereby increasing the aperture ratio while maintaining IPS mode functionality.
Solution Approach 2:
The patent divides the common electrode structure into multiple segments positioned at different edge regions of sub-pixels. By segmenting the common electrode into discrete elements rather than continuous interdigital patterns, the wiring area is reduced and the aperture ratio is increased while still achieving the necessary electric field configuration for IPS operation.
2Reliability
If common electrodes are disposed in the same layer as pixel electrodes, then the IPS mode can be implemented, but disordered electric fields are generated at the edge regions of sub-pixels causing light leakage and color mixing
Solution Approach 1:
The patent introduces a insulating layer as an intermediary between the common electrodes and the pixel electrode. This intermediary layer, positioned between the common electrode and the pixel electrode in the overlapping region, mediates the electric field interaction to prevent direct coupling that would cause disordered fields, thereby eliminating light leakage and color mixing while preserving IPS mode operation.
Solution Approach 2:
The patent applies different structural characteristics to different regions of the pixel: the insulating layer is specifically positioned in the overlapping region between common electrodes and pixel electrodes, creating local quality differentiation. This localized modification addresses the electric field disorder problem at edge regions without affecting the overall IPS mode functionality in other areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces light leakage and color mixing, enhancing the aperture ratio of sub-pixels and pixels by rectifying the electric field at the edge regions, thereby improving display performance.
Implementation Method 1
the overlap section overlaps at least one of data lines in a direction perpendicular to the base substrate
Implementation Method 2
the plurality of common electrodes and the plurality of data lines are insulated from each other
Data Source
AI summary
An array substrate, a display panel and a display device are disclosed. The array substrate includes: a plurality of gate lines, a plurality of data lines, and a plurality of common electrodes disposed on a base substrate. The plurality of gate lines are extended in a first direction, the plurality of data lines are extended in a second direction. Each of the common electrodes includes an overlap section which overlaps at least one of the data lines in a direction perpendicular to the base substrate. A gap is provided between the overlap sections of two adjacent common electrodes in the second direction, the two adjacent common electrodes overlap the same data lines in the direction perpendicular to the base substrate. An intersection of the data line and the gate line between the two adjacent common electrodes is located within the gap.