IPv4 IPv6 Dual Stack Packet Processing Hardware Software Controller
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing IPv6 packet processing technologies require complex hardware arrangements that are cost-ineffective for embedded systems with limited resources, as they need to handle both IPv4 and IPv6 protocols and variable factors in coexisting networks.
Innovation Solution
A dual stack software/hardware apparatus comprising a hardware packet processor and a software packet processor, with a packet process controller that dynamically switches between them based on protocol detection and load balancing to efficiently process IPv4 and IPv6 packets, allowing the hardware processor to handle frequently used protocols and the software processor to handle less frequent or new protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a hardware device with complicated form is used to process IPv6 extension header and ICMPv6 packets, then processing capability for IPv6 protocols is improved, but cost-effectiveness deteriorates
Solution Approach 1:
The packet processing system is segmented into two parts: a hardware packet processor for frequently used protocols (IPv4, basic IPv6) and a software packet processor for less frequent protocols (IPv6 extension headers, ICMPv6). This segmentation allows the hardware to maintain simplicity while the software provides extended functionality when needed.
Solution Approach 2:
A packet process controller acts as an intermediary between the hardware and software packet processors. It detects the protocol type and dynamically routes packets to the appropriate processor, enabling the system to achieve high adaptability without requiring permanently complex hardware for all possible protocols.
2Speed
If hardware packet processor is used for all protocols, then processing speed is improved, but resource utilization deteriorates
Solution Approach 1:
The system dynamically adjusts packet processing allocation based on protocol type and current load conditions. The packet process controller monitors hardware resource utilization and dynamically routes packets to software processing when hardware resources are heavily utilized, ensuring optimal resource utilization while maintaining high processing speeds for common protocols.
3Adaptability or versatility
If software packet processor is used for all protocols, then adaptability is improved, but processing speed deteriorates
Solution Approach 1:
Different processing qualities are applied to different protocol types: high-speed hardware processing is applied to frequently used protocols (IPv4, basic IPv6), while flexible software processing is applied to less frequent protocols (IPv6 extension headers, ICMPv6). This local quality differentiation ensures that speed is optimized where needed while adaptability is provided where required.
4Adaptability or versatility
If complicated hardware arrangement is added to process IPv6 extension header and ICMPv6 packets, then processing capability for variable factors is improved, but cost-effectiveness in embedded systems deteriorates
Solution Approach 1:
Instead of duplicating hardware circuitry for every possible protocol variant, the system uses a software packet processor that can be programmed to handle different protocols. This software copy approach provides the same adaptability as complex hardware would, but at much lower cost and with easier manufacturing, especially for embedded systems with limited resources.
Data Source
AI summary
Disclosed are an IPv4/IPv6 dual stack software/hardware apparatus for processing an Internet packet and a method thereof. The IPv4/IPv6 dual stack software/hardware apparatus for processing an internet packet includes: a hardware type packet processor configured to process the Internet packet by a system logic circuit; a software type packet processor configured to process the Internet packet according to execution of a previously prepared program; and a packet process controller configured to receive the Internet packet to control the hardware type packet processor to process the Internet packet of a preset protocol, and to control the software type packet processor to process the Internet packet of another preset protocol.