I/Q Modulator-Demodulator Filtering for High-Speed RF Harmonics
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional digital RF transmitters face challenges with high power and hardware costs for sigma-delta modulation (SDM) modules, leading to high modulation harmonics that are difficult to attenuate, especially when operating at high processing speeds, resulting in increased in-band and out-of-band noise levels.
Innovation Solution
A signal processing arrangement that includes in-phase and quadrature modulators and demodulators configured for pulse code modulation or pulse width modulation, along with harmonic filters, to efficiently filter out modulation harmonics, reducing noise and improving noise shaping performance by using cascaded modulator blocks and digital pre-distorters to optimize circuit design and processing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If sigma-delta modulation (SDM) is used for noise shaping processing, then noise shaping performance is improved, but power and hardware cost increase significantly at high processing speeds
Solution Approach 1:
The transmitter is divided into multiple parallel channels (in-phase and quadrature channels), each processing a portion of the signal. This segmentation allows the use of simpler modulation schemes in each channel while achieving overall noise shaping performance, reducing the power and hardware cost compared to using SDM in a single high-speed channel.
Solution Approach 2:
The patent replaces the mechanical/computational complexity of high-speed sigma-delta modulation with a combination of pulse width modulation (PWM) and digital filtering. This substitution uses simpler digital logic operations and post-processing filtering to achieve the desired noise shaping, avoiding the high power consumption of high-speed SDM.
2Productivity
If sigma-delta modulation (SDM) operates at high processing speed, then data rate is improved, but modulation harmonics increase and become difficult to attenuate
Solution Approach 1:
The patent applies preliminary digital filtering and pre-distortion techniques before the signal reaches the power amplifier. By pre-processing the signal to reduce harmonic content before amplification, the system achieves high processing speed without generating excessive modulation harmonics that would be difficult to attenuate later.
Solution Approach 2:
The patent introduces digital filtering and pre-distortion modules as intermediary stages between the modulator and power amplifier. These intermediaries process the signal to reduce harmonic content while maintaining high data rates, acting as a bridge that allows high-speed operation without the harmful harmonic effects.
3Object-generated harmful factors
If digital filtering is applied to remove modulation harmonics, then noise suppression is improved, but device complexity increases
Solution Approach 1:
The patent applies filtering selectively at specific stages where it is most effective, rather than using complex filtering throughout the entire signal chain. By applying partial filtering at critical points (after modulation and before amplification), the system achieves good noise suppression without the excessive complexity of comprehensive filtering.
Solution Approach 2:
The patent uses periodic pulse width modulation techniques that inherently shape noise to specific frequency bands, reducing the need for complex continuous filtering. The periodic nature of PWM allows for simpler periodic or band-limited filtering approaches compared to continuous complex filtering requirements.
Data Source
Figure 1~2
Figure 3~4
Figure 5~6
AI summary
A signal processing arrangement (100) for a transmitter (200) is described. The signal processing arrangement (100) comprises an in-phase modulator (102) configured to receive an in-phase signal (I) and configured to modulate the in-phase signal (I); a quadrature modulator (104) configured to receive a quadrature signal (Q) and configured to modulate the quadrature signal (Q); an in-phase demodulator (140) configured to demodulate the modulated in-phase signal (I) and to output a demodulated in-phase signal (I); a quadrature demodulator (142) configured to demodulate the modulated quadrature signal (Q) and to output a demodulated quadrature signal (Q); an in-phase harmonic filter (106) configured to perform a filtering on harmonics in the demodulated in-phase signal (I) and to output an in-phase digital signal (I); a quadrature harmonic filter (108) configured to perform a filtering on harmonics in the demodulated quadrature signal (Q) and to output a quadrature digital signal (Q).