I/Q Phase-Correction Circuit Using Edge Delay Control
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Solution Overview
Problem
Low-IF receivers face challenges in generating precise in-phase and quadrature signals due to phase and amplitude mismatches, which affect image rejection and increase power consumption, especially in high-performance ADC circuits.
Innovation Solution
A phase-correction circuit with two circuits that selectively vary the propagation delay of rising and falling edges, using a current-controlled limiting amplifier and feedback loop to regulate the duty cycle and phase shift between in-phase and quadrature signals, ensuring accurate and precise signal generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If phase and amplitude mismatches are not corrected in low-IF receivers, then device complexity is reduced, but image rejection performance deteriorates
Solution Approach 1:
The patent implements feedback loops that detect phase and amplitude mismatches between in-phase and quadrature signals and automatically adjust the signals to correct the mismatches. This feedback mechanism improves image rejection performance by dynamically compensating for errors without requiring complex manual calibration or redesign of the receiver architecture.
Solution Approach 2:
The patent adjusts signal parameters (phase and amplitude) dynamically to correct mismatches. By changing these parameters through controlled adjustment mechanisms, the system achieves better image rejection while maintaining a relatively simple device structure, avoiding the need for completely complex alternative architectures.
2Manufacturing precision
If phase correction circuits are added to correct mismatches, then image rejection performance is improved, but power consumption increases
Solution Approach 1:
The feedback-based correction circuit continuously monitors and adjusts phase and amplitude mismatches, improving image rejection performance. The circuit is designed to operate efficiently with low power consumption by using adaptive adjustment mechanisms that only activate when mismatches are detected, rather than continuously operating at full power.
Solution Approach 2:
The correction circuit employs dynamic adjustment mechanisms that adapt to varying signal conditions. The circuit can adjust its operation level based on the severity of mismatches and signal characteristics, allowing it to maintain high image rejection performance while consuming minimal power during normal operation, and only increasing power consumption when necessary to correct significant errors.
3Speed
If high-frequency carrier signals are used for modulation, then transmission speed is improved, but phase error generation increases
Solution Approach 1:
The feedback correction circuit detects phase errors introduced during high-frequency modulation and transmission, and automatically adjusts the in-phase and quadrature signals to compensate for these errors. This allows the system to maintain high transmission speeds while correcting phase errors that occur during signal processing and transmission.
Solution Approach 2:
The correction circuit performs preliminary adjustment of phase and amplitude parameters before signals are transmitted or processed further. By proactively correcting potential phase errors before they affect transmission performance, the system can operate at high frequencies with maintained precision, preventing rather than just reacting to phase errors.
Data Source
AI summary
A system for correction of the phase error in in-phase and quadrature signals may include a first signal and a second signal. The system includes a first circuit and a second circuit, each circuit configured for receiving a square-wave input signal and supplying a respective square-wave output signal. The output signal is delayed with respect to the input signal and each circuit is configured in such a way that the propagation delay of a rising edge and the propagation delay of a falling edge between the input signal and the output signal are configurable. The first circuit is configured for receiving the first signal, and the second circuit is configured for receiving the second signal.


