Interrupt Routing Controller Saturate Value Queuing

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Solution Overview

Problem

Conventional data processing systems face inefficiencies in handling queued interrupts, particularly due to the need for software to decode event sources and redirect interrupts, which delays user program execution and increases system bus traffic when the number of outstanding interrupts exceeds the capacity of interrupt presentation controllers.

Innovation Solution

The implementation of an interrupt routing controller that maintains backlog counts for each interrupt handler and sets a saturate value for each event path, optimizing the number of processor threads available for processing and eliminating the need for reject messages by using interrupt destination buffers to queue interrupt information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If software decodes event sources and redirects interrupts, then interrupt handling flexibility is improved, but user program execution is delayed and system bus traffic increases

Engineering Contradiction:

Improveinterrupt handling flexibilityVSAvoiduser program execution delay

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The interrupt routing controller pre-decodes event sources and pre-determines target interrupt handlers during system initialization or event path setup. This preliminary action stores the mapping information in advance, eliminating the need for software to perform real-time decoding and redirection during interrupt handling, thus reducing execution delay while maintaining flexibility.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The interrupt routing controller acts as an intermediary hardware component between the interrupt source and the processor. It hardware-accelerates the event source decoding and target handler selection processes, mediating the interrupt routing function to reduce the time burden on software and minimize user program execution delays.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If the number of outstanding interrupts exceeds interrupt presentation controller capacity, then interrupt handling completeness is improved, but system bus traffic increases due to reject messages

Engineering Contradiction:

Improveinterrupt handling completenessVSAvoidsystem bus traffic

Core Design Contradiction:

ReliabilityVSLoss of energy

Solution Approach 1:

The interrupt routing controller pre-queues interrupt information in interrupt destination buffers before the interrupt presentation controller processes them. This preliminary queuing action allows the system to accommodate more outstanding interrupts than the controller's immediate processing capacity, preventing reject messages and reducing bus traffic while maintaining complete interrupt handling.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The interrupt destination buffers serve as an intermediary storage mechanism between the interrupt source and the interrupt presentation controller. This intermediate buffering capacity absorbs the mismatch between interrupt arrival rates and controller processing rates, allowing complete interrupt handling without exceeding controller capacity limits and avoiding reject message overhead.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Quantity of substance

If backlog counts are incremented without limits, then interrupt queuing capacity is improved, but system scalability is reduced when backlog exceeds available virtual processor threads

Engineering Contradiction:

Improveinterrupt queuing capacityVSAvoidsystem scalability

Core Design Contradiction:

Quantity of substanceVSAdaptability or versatility

Solution Approach 1:

The system dynamically adjusts the saturate value parameter for each event path based on the number of available virtual processor threads. When thread availability changes, the saturate value is updated accordingly, allowing the interrupt queuing capacity to adapt to system conditions. This parameter change ensures optimal utilization of available resources while maintaining scalability.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The interrupt routing controller implements feedback monitoring of the backlog count against the saturate value for each event path. When the backlog count approaches the saturate value, the system receives feedback to stop incrementing, preventing overflow. This feedback mechanism ensures that interrupt queuing capacity remains aligned with available virtual processor threads, maintaining system scalability while providing sufficient queuing capacity.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS10614010B2Handling queued interrupts in a data processing system based on a saturate value

Publication Date: 2020.04.07 CAPROCK INTEGRATED TECHNOLOGIES LLC

AI summary

A technique for handling queued interrupts includes accumulating, by an interrupt routing controller (IRC), respective backlog counts for respective event paths. The backlog counts track a number of events received but not delivered as interrupts to associated virtual processor (VP) threads upon which respective target interrupt handlers execute. An increment backlog (IB) message is received by the IRC. In response to receiving the IB message, the IRC determines an associated saturate value for an event path specified in the IB message. The IRC increments an associated backlog count for the event path specified in the IB message as long as the associated backlog count does not exceed the associated saturate value.