Iridium Interfacial Stack for High-Temperature SiC Circuit Fabrication

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Solution Overview

Problem

Conventional high-temperature electronics face challenges in preventing diffusion of elements like gold, platinum, oxygen, and silicon at elevated temperatures, which complicates the fabrication and operation of silicon carbide integrated circuits, particularly in applications exceeding 500°C.

Innovation Solution

An iridium interfacial stack (IrIS) comprising layers of TaSi2, Pt, and Ir is used as a diffusion barrier, preventing the migration of these elements and allowing for simpler, faster, and cost-effective fabrication of high-temperature integrated circuits by maintaining a pure platinum surface for gold wire bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a nitrogen anneal is performed to form ohmic contacts, then the contacts survive high temperature operation, but Pt2Si forms on the surface making gold wire bonding difficult

Engineering Contradiction:
Improvecontact survival at high temperatureVSAvoidwire bonding difficulty
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent introduces an iridium layer as an intermediary between the Pt2Si contact layer and the gold wire bonding layer. This iridium intermediary prevents direct interaction between the Pt2Si surface and gold, enabling wire bonding to proceed successfully while maintaining the reliability benefits of the nitrogen annealed contact.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the metallization stack into distinct functional layers: the Pt2Si ohmic contact layer for electrical connection, an intermediate iridium layer for diffusion barrier and bonding surface, and a top platinum layer for wire bonding. This segmentation allows each layer to optimize its specific function without interfering with others.

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If a second metallization stack is deposited to enable wire bonding, then wire bonding becomes easy, but extra masking and deposition steps are added

Engineering Contradiction:
Improvewire bonding easeVSAvoidprocess steps
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The iridium layer serves multiple functions simultaneously: it acts as a diffusion barrier preventing silicon migration, provides a wire-bondable surface for gold bonding, and serves as an intermediate layer in the metallization stack. This multi-functionality eliminates the need for separate dedicated bonding layers or additional masking steps.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Temperature

If high temperature operation is enabled, then electronics can operate at elevated temperatures, but element diffusion increases

Engineering Contradiction:
Improveoperating temperatureVSAvoidelement diffusion
Core Design Contradiction:
TemperatureVSStability of the object's composition

Solution Approach 1:

The patent employs a composite metallization structure consisting of multiple layers with different material properties: Pt2Si for ohmic contact, iridium for diffusion barrier and bonding, and platinum for wire bonding. This composite structure leverages the complementary properties of each material to simultaneously enable high temperature operation and prevent element diffusion.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The iridium layer acts as an intermediary diffusion barrier between silicon-containing layers and gold wire bonding layers. It prevents silicon from migrating into the gold at high temperatures while allowing the system to operate at elevated temperatures, thus mediating between thermal operation and compositional stability requirements.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The IrIS effectively prevents diffusion of gold, platinum, oxygen, and silicon, ensuring the stability and longevity of high-temperature silicon carbide integrated circuits, enabling reliable operation up to 500°C without the need for additional annealing or masking steps, and facilitating easier wire bonding.

Implementation Method 1

The IrIS is configured to prevent, reduce, or mitigate against diffusion of at least one element through at least some layers of the IrIS

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS9013002B1Iridium interfacial stack (IRIS)
Publication Date: 2015.04.21 US GOVT ADMINISTATOR OF NASA
  • US9013002B1 patent drawing
  • US9013002B1 patent drawing
  • US9013002B1 patent drawing

AI summary

An iridium interfacial stack (“IrIS”) and a method for producing the same are provided. The IrIS may include ordered layers of TaSi2, platinum, iridium, and platinum, and may be placed on top of a titanium layer and a silicon carbide layer. The IrIS may prevent, reduce, or mitigate against diffusion of elements such as oxygen, platinum, and gold through at least some of its layers.