Irregular LDPC Decoding With Scaled Bit Flip Thresholds
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Solution Overview
Problem
Existing memory sub-systems face inefficiencies in error correction processes, particularly in irregular low density parity check decoding, where uniform bit flip thresholds fail to effectively identify and correct errors due to varying numbers of parity check equations associated with each bit, leading to sub-optimal performance and resource-intensive operations.
Innovation Solution
Implementing scaled bit flip thresholds across columns in the memory sub-system, where the parity check component normalizes energy levels and uses a maximum energy fraction criterion to determine bit flipping, accounting for differences in parity check equations associated with each bit, to initiate an iterative LDPC correction process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If uniform bit flip thresholds are used in irregular LDPC decoding, then the decoding process is simple to implement, but decoding performance deteriorates due to varying numbers of parity check equations per bit
Solution Approach 1:
The patent applies local quality by transitioning from uniform bit flip thresholds to column-specific scaled thresholds. Each column receives a threshold scaled according to its specific characteristics (number of parity check equations), allowing the system to adapt to local variations in the irregular LDPC code structure while maintaining overall system coherence.
Solution Approach 2:
The patent implements parameter changes by modifying the bit flip threshold parameter from a uniform value to scaled values specific to each column. The scaling factor is derived from the ratio of the column weight to the maximum column weight, dynamically adjusting the threshold parameter to match the varying density characteristics of different columns in the irregular LDPC matrix.
2Reliability
If scaled bit flip thresholds are implemented across columns, then decoding performance improves, but computational complexity and energy consumption increase
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing the scaling factors for each column before the actual decoding process begins. These scaling factors are derived from the known code structure (column weights) and are prepared in advance, allowing the decoder to use simple multiplicative scaling during operation rather than performing complex real-time calculations, thus reducing energy consumption during the critical decoding phase.
3Loss of time
If scaled bit flip thresholds are used, then time consumption in error correction is reduced, but the system complexity increases
Solution Approach 1:
The patent uses parameter changes to transform the bit flip threshold from a static uniform value to a dynamically scaled parameter. This allows the system to adapt to varying column characteristics without fundamentally changing the decoding algorithm structure, maintaining implementation simplicity while achieving faster convergence through more accurate threshold selection that reflects the actual code density distribution.
Data Source
AI summary
A processing device in a memory sub-system reads a sense word from a memory device and executes a plurality of parity check equations on corresponding subsets of the sense word to determine a plurality of parity check equation results. The processing device further determines a syndrome for the sense word using the plurality of parity check equation results and determines whether the syndrome for the sense word satisfies a codeword criterion. Responsive to the syndrome for the sense word not satisfying the codeword criterion, the processing device performs an iterative low density parity check (LDPC) correction process using a scaled bit flip threshold to correct one or more errors in the sense word.