Irregular Sub Core Power Domain Separation

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Solution Overview

Problem

Conventional processing device designs with rectangular or rectilinear shaped sub cores result in wasted space between cores, requiring inefficient design processes with multiple iterations to meet constraints, and lack efficient power domain separation.

Innovation Solution

Implementing sub cores with irregular shapes facilitated by power breaker cells that provide discontinuities in power rails to separate and independently power different domains, allowing for more efficient use of semiconductor space and reduced design iterations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If rectangular or rectilinear shapes are used for sub cores, then power domain partitioning is simplified, but wasted space between cores increases

Engineering Contradiction:
Improvepower domain partitioningVSAvoidwasted space between cores
Core Design Contradiction:
Ease of manufactureVSArea of stationary object

Solution Approach 1:

The power domain separation is achieved by segmenting the power rails using power breaker cells at irregular boundaries between sub cores. This allows each sub core to have its own power domain while following irregular shapes that minimize wasted space, resolving the contradiction between ease of power domain partitioning and space efficiency.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs asymmetric, irregular shapes for sub core boundaries instead of conventional rectangular shapes. These irregular boundaries are defined by power breaker cells that create discontinuities in power rails, enabling both space-efficient packing and clear power domain separation.

Inventive Principle:
Principle #4Asymmetry

2Reliability

If multiple iterations are performed to meet constraints, then data timing and power constraints are satisfied, but design efficiency decreases

Engineering Contradiction:
Improveconstraint satisfactionVSAvoiddesign efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

Power breaker cells are introduced early in the design process to define irregular sub core boundaries and establish power domain separations before detailed design iterations. This preliminary action sets up the framework for meeting constraints with fewer subsequent iterations, improving design efficiency while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

3Area of stationary object

If irregular shapes are used for sub cores, then space efficiency is improved, but power domain separation becomes more complex

Engineering Contradiction:
Improvesemiconductor space utilizationVSAvoidpower domain separation
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

Power breaker cells serve as intermediary elements that implement power domain separation at irregular sub core boundaries. These specialized cells provide the discontinuities in power rails needed for domain separation while accommodating irregular shapes, thus enabling space efficiency without excessive complexity in power domain management.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10394299B2Systems and methods to separate power domains in a processing device
Publication Date: 2019.08.27 QUALCOMM INC
  • US10394299B2 patent drawing
  • US10394299B2 patent drawing
  • US10394299B2 patent drawing

AI summary

A system includes a processing core built on a semiconductor substrate, the processing core having a first sub core and a second sub core, each of the first and second sub cores configured to perform a processing function, and a plurality of power rails traversing a dimension of the processing core and spanning from the first sub core to the second sub core, each of the power rails being configured to provide an operating voltage to the first and second sub cores, and wherein a boundary between the first sub core and the second sub core is irregularly shaped, and wherein each of the first and second sub cores corresponds to a respective power domain.