Irreversible Memory Cell Security via Segmentation

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Solution Overview

Problem

Existing memories, particularly irreversibly programmable ones, lack effective protection against unauthorized data access, especially after they become 'dead' memories, and generators of physically unclonable functions do not adequately secure data against such threats.

Innovation Solution

The implementation of a device with multiple memory cells, each connected through doped semiconductor areas and switches, arranged in a matrix with conductive tracks and gates, which allows for secure programming and reading by ensuring only one memory point is programmed at a time, and uses a common conductive area to enhance protection against unauthorized access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If irreversibly programmable memory cells are used, then data storage capability is improved, but security protection against unauthorized access deteriorates

Engineering Contradiction:
Improvedata storage capabilityVSAvoidunauthorized data access
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The memory cell is divided into multiple memory points (at least two) within a single cell structure, each capable of being independently programmed. This segmentation allows the system to store multiple bits of information while maintaining the irreversible programming characteristic, thereby enhancing both storage capability and security against unauthorized access.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of security by implementing a switching mechanism that can selectively connect or disconnect different memory points. This switching capability adds a temporal and operational dimension to the traditionally static memory cell, enabling dynamic control over which memory points are accessible, thus protecting against unauthorized access while maintaining data storage reliability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Quantity of substance

If multiple memory points are programmed in a cell, then data storage capacity is improved, but difficulty in distinguishing memory points increases

Engineering Contradiction:
Improvedata storage capacityVSAvoidmemory point distinction
Core Design Contradiction:
Quantity of substanceVSDifficulty of detecting and measuring

Solution Approach 1:

The patent implements a dynamic switching mechanism that can selectively activate or deactivate different memory points within a cell. This dynamic control allows the system to program multiple memory points while maintaining the ability to distinguish and access them individually through controlled switching operations, thereby increasing storage capacity without sacrificing memory point distinguishability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The switching mechanism is configured to preliminarily select and isolate specific memory points before programming operations occur. This preliminary action ensures that even when multiple memory points are programmed within a cell, they remain distinguishable through the switching control structure, which can selectively connect each memory point to programming and reading circuits.

Inventive Principle:
Principle #10Preliminary action

3Object-affected harmful factors

If a switching mechanism is added to control memory points, then security protection is improved, but device complexity increases

Engineering Contradiction:
Improvesecurity protectionVSAvoiddevice structure
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The switching mechanism in the patent is designed to serve multiple functions simultaneously: it provides security protection by controlling access to memory points, enables programming of multiple memory points, and maintains the ability to distinguish and read individual memory points. This multi-functionality reduces the need for separate dedicated components for each function, thereby limiting the increase in device complexity while achieving improved security.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the switching control mechanism directly into the memory cell structure, integrating it with the existing memory point architecture. By combining the switching function with the memory cell rather than adding it as a separate external component, the design achieves enhanced security while minimizing the increase in overall device complexity through structural integration.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution provides enhanced protection for data stored in memories by making it difficult for attackers to distinguish between memory points, thereby increasing the security of 'dead' memories and ensuring that only one memory point is programmed, ensuring secure data storage and retrieval.

Implementation Method 1

First doped semiconductor zones connect the first areas together

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

a switch coupling the cell to the first area. First doped semiconductor zones connect the first areas together

Methodology Applied
Scientific EffectElectrical conduction control: Conduction (electrical)

Implementation Method 3

each cell comprises one or more irreversibly programmable memory points, each comprising a second semiconductor zone and a gate located on the second zone

Methodology Applied
Scientific EffectElectrical field control: Electric Field

Data Source

PatentUS11164647B2Electronic chip memory
Publication Date: 2021.11.02 STMICROELECTRONICS FRANCE
  • US11164647B2 patent drawing
  • US11164647B2 patent drawing
  • US11164647B2 patent drawing

AI summary

A device includes a number of irreversibly programmable memory points. Each irreversibly programmable memory point includes a first semiconductor zone and a gate located on the first zone. A conductive area defines the gates of the memory points. First and second semiconductor areas are respectively located on either side of a vertical alignment with the conductive area. The first zones are alternately in contact with the first and second areas.