Irreversible Memory Cell Security via Segmented Switch Control
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Solution Overview
Problem
Existing memories, particularly irreversibly programmable ones, lack effective protection against unauthorized data access, especially after they become 'dead' memories, and generators of physically unclonable functions do not adequately secure data against such threats.
Innovation Solution
The implementation of a device with multiple memory cells connected through doped semiconductor areas and switches, where each cell has a unique programming mechanism involving a conductive track and transistor gates, ensuring that only one memory point is programmable at a time, and using a common conductive area to enhance security by making it difficult for attackers to distinguish between memory points.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If irreversibly programmable memory cells are used, then data protection against unauthorized access is improved, but the memory becomes inaccessible after programming (dead memory state)
Solution Approach 1:
The memory is divided into multiple independent memory cells (at least three), each with its own switch and doped semiconductor area. This segmentation allows the system to maintain data protection through irreversible programming while enabling selective access to individual cells through the switch mechanism, preventing the entire memory from becoming completely inaccessible.
Solution Approach 2:
The patent introduces switches that can dynamically control the state of individual memory cells. The switches are coupled to doped semiconductor areas and can be selectively activated or deactivated, allowing the memory system to transition between protected (dead memory) and accessible states on demand, thus resolving the contradiction between permanent protection and operational accessibility.
2Ease of manufacture
If multiple memory cells are connected through common doped semiconductor areas, then manufacturing complexity is reduced, but it becomes harder to distinguish between individual memory points for security purposes
Solution Approach 1:
The patent introduces switches as intermediary elements between the common doped semiconductor areas and the memory cells. These switches act as mediators that provide individual control and identification for each memory cell while sharing the common doped semiconductor infrastructure, thus maintaining both manufacturing simplicity and security distinguishability.
Solution Approach 2:
While the doped semiconductor areas are common and shared across multiple memory cells (providing manufacturing ease), each memory cell is equipped with its own switch with unique control characteristics. This local differentiation through switches allows individual memory points to be distinguished and controlled independently despite sharing common infrastructure.
3Reliability
If only one memory point is programmable at a time, then security against unauthorized access is enhanced, but programming time for the entire memory increases
Solution Approach 1:
The patent enables sequential programming of memory cells through periodic activation of switches. Each memory cell can be programmed in turn by activating its associated switch at specific time intervals, allowing the system to maintain the security benefit of one-at-a-time programming while efficiently completing the programming of multiple cells through systematic time-based control.
Solution Approach 2:
The switches are pre-configured and coupled to their respective memory cells and doped semiconductor areas before programming begins. This preliminary setup allows for rapid sequential programming by simply activating the appropriate switch for each cell in sequence, minimizing the overall programming time while maintaining security through controlled individual access.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution significantly enhances data protection by ensuring that only one memory point is programmed at a time, making it harder for unauthorized access and providing a higher level of security against data breaches, even in 'dead' memory states.
Implementation Method 1
First doped semiconductor zones connect the first areas together
Implementation Method 2
each switch comprises a transistor comprising a gate, the gates being disjunct and having collinear elongated shapes
Implementation Method 3
each cell comprises one or more irreversibly programmable memory points, each comprising a second semiconductor zone and a gate located on the second zone
Data Source
AI summary
A device includes a first switch, a first irreversibly programmable memory point, and a second irreversibly programmable memory point coupled in parallel with the first irreversibly programmable memory point. The first switch and the parallel combination of the first and second irreversibly programmable memory points are coupled in series between a first node and a second node.