Software iSCSI Error Injection for Storage Component Testing

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Solution Overview

Problem

Conventional storage array systems lack the capability to inject protocol-specific errors in iSCSI format during component certification, requiring expensive hardware and expert intervention, and are not suitable for remote setups or automated testing.

Innovation Solution

A software-based system that injects errors directly into Protocol Data Units (PDUs) within an existing component, such as an initiator circuit, allowing for automated testing without dedicated hardware or protocol experts, enabling efficient and flexible error injection and validation of iSCSI components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a Fibre Channel protocol analyzer is used for error injection, then error injection capability is provided, but cost increases and iSCSI protocol support is unavailable

Engineering Contradiction:
Improveerror injection capabilityVSAvoidprotocol compatibility
Core Design Contradiction:
Object-affected harmful factorsVSAdaptability or versatility

Solution Approach 1:

The system implements a universal error injection mechanism that can handle multiple protocols including iSCSI and Fibre Channel through a common software architecture. The PDU generation and error injection logic is protocol-agnostic, allowing the same hardware interface and processing pipeline to serve different storage protocols without requiring separate dedicated analyzers for each protocol type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention replaces the mechanical/hardware-based Fibre Channel analyzer approach with a software-based error injection system. Instead of using dedicated hardware protocol analyzers that require physical insertion into the network path, the system uses software modules running on existing system components (initiator or target) to generate and inject errors into PDUs, eliminating the need for separate hardware devices while maintaining protocol-specific functionality.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Object-affected harmful factors

If a hardware protocol analyzer is used for error injection, then error injection is possible, but device complexity and space requirements increase

Engineering Contradiction:
Improveerror injection capabilityVSAvoidhardware requirements
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The error injection functionality is extracted from the traditional hardware analyzer and embedded directly into the software running on the initiator or target system. This extraction eliminates the need for separate hardware devices, reducing device complexity and space requirements while maintaining the core error injection capability through software-based PDU manipulation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system merges the error injection functionality with the existing initiator or target software components. Rather than maintaining a separate hardware analyzer, the error injection logic is combined with the normal PDU processing path, allowing errors to be injected as part of the regular data flow without requiring additional hardware infrastructure.

Inventive Principle:
Principle #5Merging (Combining)

3Object-affected harmful factors

If a hardware analyzer is used for error injection, then error injection can be performed, but transmission delays are introduced

Engineering Contradiction:
Improveerror injection capabilityVSAvoidtransmission delay
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The system performs error injection as a preliminary action during PDU generation, before the data enters the transmission pipeline. By modifying the PDU contents during the software processing stage rather than intercepting and modifying data in transit through hardware, the system eliminates the time-consuming tapping, modification, and retransmission cycles that cause delays in hardware-based analyzers.

Inventive Principle:
Principle #10Preliminary action

4Ease of operation

If a separate PC/Laptop is used to monitor and modify the Analyzer, then error injection can be controlled, but system complexity and cost increase

Engineering Contradiction:
Improveerror injection controlVSAvoidmonitoring infrastructure
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The initiator or target system itself performs the error injection control functions that would traditionally require a separate monitoring PC. The software module running on the system being tested can autonomously generate test sequences, inject errors according to configured parameters, and monitor results without requiring external control hardware or additional workstations, thereby eliminating the need for separate monitoring infrastructure.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS8843786B2System for injecting protocol specific errors during the certification of components in a storage area network
Publication Date: 2014.09.23 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8843786B2 patent drawing
  • US8843786B2 patent drawing
  • US8843786B2 patent drawing

AI summary

An apparatus comprising an initiator circuit and a target circuit. The initiator circuit may be configured to (i) communicate with a network through a first interface and (ii) generate testing sequences to be sent to the network. The target circuit may be configured to (i) receive the testing sequences from the network through a second network interface and (ii) respond to the testing sequences.