ISDB-T Time Deinterleaver Architecture With LUT-Based Buffer Addressing
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Solution Overview
Problem
In OFDM-based ISDB-T communication systems, the deinterleaver design requires large memory and complex counter implementations, leading to increased power consumption and area, which is undesirable.
Innovation Solution
The proposed solution involves a deinterleaver apparatus with a practical OFDM symbol counter of 25-30 bits, a divider for calculating intra-buffer offset, and lookup tables for obtaining delay buffer sizes and buffer base addresses, implemented using ROM or dynamic arithmetic calculations, to reduce the complexity and area of the deinterleaver design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If RAM-based deinterleaver design is used, then data deinterleaving performance is maintained, but chip area and power consumption increase due to large memory and multiple counters
Solution Approach 1:
The patent extracts and removes the large deinterleaver delay buffer memory from the RAM-based design. Instead of using extensive memory resources, the invention implements a streamlined architecture that processes deinterleaving operations without requiring large buffer memories, thereby reducing chip area while preserving deinterleaving functionality
Solution Approach 2:
The patent uses lookup tables (LUTs) to store pre-computed deinterleaving patterns and buffer address mappings. These LUTs act as compact copies of the deinterleaving logic, replacing the need for large RAM buffers and complex counter implementations, thus achieving area reduction while maintaining performance
2Measurement precision
If multiple memory pointers and counters are implemented, then deinterleaving accuracy is improved, but device complexity and power consumption increase
Solution Approach 1:
The patent merges the functionality of multiple memory pointers and counters into a unified lookup table structure. The LUTs contain pre-computed addressing information that combines what would otherwise require separate pointer and counter circuits, simplifying the design while maintaining precise deinterleaving control
Solution Approach 2:
The patent performs deinterleaving address calculations in advance and stores the results in lookup tables during system initialization or fabrication. This preliminary computation eliminates the need for complex real-time counter operations and pointer management, reducing design complexity while preserving accuracy
3Reliability
If large deinterleaver delay buffer is used, then burst error protection is improved, but power consumption increases due to memory operations
Solution Approach 1:
The patent replaces expensive, power-consuming large RAM buffers with compact lookup tables that store only the essential deinterleaving pattern information. These LUTs occupy minimal memory space and require far fewer read/write operations, significantly reducing power consumption while maintaining burst error protection capabilities through efficient data redistribution
Data Source
AI summary
A method and apparatus for de-interleaving interleaved data in a deinterleaver memory in an Orthogonal Frequency Division Multiplexing (OFDM) based Integrated Services Digital Broadcasting Terrestrial (ISDB-T) receiver. In different embodiments, the apparatus comprises of a OFDM symbol counter along with a divider or a buffer pointer RAM with circular pointer logic, a first lookup table to obtain delay buffer size and interleaving lengths for a given OFDM transmission layer, and a second lookup table to obtain buffer base address and interleaving lengths for a given OFDM transmission layer.