Implementation Set Abstraction for FPGA Design Complexity
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Solution Overview
Problem
The complexity of modern circuit designs, particularly for Field Programmable Gate Arrays (FPGAs), is exacerbated by heterogeneous design tools with multiple flows that lack uniformity, leading to inefficiencies and increased maintenance overhead due to different notions of partial net-lists and design entities.
Innovation Solution
The introduction of an Implementation Set (I-Set) abstraction provides a unified paradigm for specifying partial net-lists, simplifying client applications' interface to net-list information and allowing for flow-independent operation, reducing the need to distinguish between various net-list entities like user floor-planned partitioning, modules, and flat designs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple separate flows are used to address different design needs, then specific customer needs are met, but tool complexity and maintenance overhead increase
Solution Approach 1:
The patent introduces a unified implementation set data model that serves as a universal foundation for multiple design flows. This single data model structure can represent different design entities (Area Groups, Modules, PIMs, Hard Macros, Soft IP Cores) and support various flows (Incremental, Modular, Partial Reconfiguration, Normal Guide) without requiring separate data structures for each flow, thereby reducing tool complexity while maintaining versatility
Solution Approach 2:
The patent segments the design representation into hierarchical implementation sets that can be independently manipulated. The implementation set data model divides the overall design into manageable components (blocks and signals) that can be processed separately by different flows, allowing each flow to work with appropriate granularity levels while sharing a common underlying structure
2Adaptability or versatility
If different notions of partial net-lists are used in different flows, then specific flow requirements are met, but software overhead increases
Solution Approach 1:
The implementation set data model provides a universal representation that can serve multiple flow-specific requirements. The same data model structure supports Area Groups for Incremental Design, Modules for Modular Design, and PIMs for Partial Reconfiguration, eliminating the need for separate data structures and reducing software overhead while maintaining flow-specific capabilities
Solution Approach 2:
The patent uses parameter changes within the unified implementation set data model to accommodate different flow requirements. By modifying parameters such as the scope of blocks and signals included, the same data model can represent different notions of partial net-lists appropriate for each flow without requiring structural changes
3Adaptability or versatility
If each interactive flow is implemented separately, then specific flow functionality is achieved, but ease of operation decreases
Solution Approach 1:
The unified implementation set data model provides a consistent interface for all interactive flows, improving ease of operation. Users work with the same data model structure regardless of which flow they are using, reducing the learning curve and operational complexity while maintaining the specialized functionality of each flow
Data Source
AI summary
A design hierarchy based on an implementation set abstraction of a user design for an integrated circuit design includes a plurality of nodes and a definition for each of the nodes in the plurality of nodes that describes the type of elements contained in each node and the hierarchy defined by each of the nodes. Each node can include at least one implementation element of the design and the at least one implementation element can be selected among the group including a set of logical elements, a set of placed elements, and a set of placed and routed elements.