Inter-symbol Interference Filter With Bypass Path
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Solution Overview
Problem
Conventional inter-symbol interference (ISI) filters require high power to compensate for parasitic losses, making them inefficient for high bandwidth operations, and fail to effectively emulate frequency-dependent losses across a wide frequency range.
Innovation Solution
The design incorporates multiple amplifier stages with programmable poles and zeros, featuring a high performance bypass path and a bandwidth limited path, allowing for adjustable signal routing and reduced power consumption by bypassing parasitic losses during high bandwidth operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional ISI filter architecture is used to compensate for parasitic losses, then the filter can operate over a wide frequency range, but power consumption increases significantly
Solution Approach 1:
The patent implements dynamic signal routing that adapts the filter architecture based on operating conditions. A switch selectively connects either the full bridge architecture (for wide frequency range) or a bypass path (for high bandwidth operations), allowing the system to dynamically adjust its configuration to minimize power consumption while maintaining the required frequency range coverage.
Solution Approach 2:
The patent applies different architectural configurations to different operating scenarios. The full bridge architecture with parasitic loss compensation is used only when wide frequency range is required, while a simplified bypass path is used when high bandwidth operations are needed, giving each part of the system the appropriate quality for its specific function.
2Reliability
If high power is used to compensate for parasitic losses, then the filter can maintain performance across wide bandwidth, but the efficiency decreases
Solution Approach 1:
The system dynamically switches between two operational modes: full bridge mode for maintaining signal performance across wide frequency ranges, and bypass mode for high bandwidth operations where parasitic loss compensation is not needed. This dynamic adaptation ensures optimal power efficiency while maintaining required signal performance.
Solution Approach 2:
The patent extracts the parasitic loss compensation function from the main signal path and places it in a parallel bridge configuration. This allows the compensation to be applied selectively only when needed, rather than being always present in the main path, thereby improving overall power efficiency.
3Use of energy by moving object
If parasitic losses are hidden or bypassed during high bandwidth operation, then power consumption is reduced, but the filter cannot accurately emulate frequency dependent losses
Solution Approach 1:
The patent implements a dynamic switching mechanism that selects between full bridge architecture (for accurate loss emulation) and bypass path (for high bandwidth operations). The switch is controlled based on the required operating mode, ensuring that loss emulation accuracy is maintained when needed while allowing power-efficient operation when bandwidth is the priority.
Solution Approach 2:
The system changes its architectural parameters dynamically by switching between two configurations. When accurate loss emulation is required, the full bridge parameters are activated; when high bandwidth operation is needed, the bypass parameters are activated. This parameter switching resolves the contradiction between accuracy and power efficiency.
Data Source
AI summary
An inter-symbol interference (ISI) loss filter device emulates frequency dependent losses to an electrical signal. The ISI loss filter device includes amplifier stages connected in series for cascading programmable poles or zeros in a signal path carrying the electrical signal. Each amplifier stage includes a high performance bypass path, a bandwidth limited path parallel to the high performance bypass path, a controllable signal router for routing a variable first and second portions of the electrical signal through the high performance bypass path and the bandwidth limited path, respectively, and a summing junction to combine outputs of the high performance bypass path and the bandwidth limited path for outputting a test signal with high and low frequency content. The high performance bypass path transmits an entire bandwidth of the first portion of the electrical signal, and the bandwidth limited path transmits a controllable limited bandwidth of the second portion of the electrical signal.