Ising Device Network Routing for Scalable Optimization

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Solution Overview

Problem

Conventional methods for solving multivariable optimization problems using neural networks, such as Ising devices, face challenges in hardware implementation due to complex wiring and high resource requirements, making it difficult to realize large-scale calculations efficiently.

Innovation Solution

An information processing apparatus comprising multiple Ising devices connected via common buses, with a control device that manages neuron circuits, memory for connection information, and a router to facilitate efficient updating and noise management, allowing for scalable operations without the need for complex wiring or multiple chip configurations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If multiple chips or processors are connected to establish a neural network for large-scale operations, then the calculation capability for large-scale optimization problems is improved, but the wiring becomes complicated and the preparation time and effort increase significantly

Engineering Contradiction:
Improvecalculation capability for large-scale optimization problemsVSAvoidwiring complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system is divided into multiple Ising devices, each functioning as an independent neuron circuit unit. Each Ising device contains multiple neuron circuits that can independently process information, allowing the system to scale by simply adding more modular units rather than creating complex interconnections between traditional processors.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each Ising device is designed with universal functionality to serve multiple purposes: it can act as both a neuron circuit and a processing unit, and can communicate with other Ising devices through standard interfaces. This multi-functionality eliminates the need for specialized wiring configurations for different types of connections.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If multiple chips or processors are connected to establish a neural network for large-scale operations, then the calculation capability for large-scale optimization problems is improved, but the preparation time and effort increase significantly

Engineering Contradiction:
Improvecalculation capability for large-scale optimization problemsVSAvoidpreparation time and effort
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system performs preliminary configuration by pre-establishing the connection topology and weight values in the memory of each Ising device before execution. The control device prepares the problem data and configures the neural network parameters in advance, so that when the calculation starts, the hardware is already ready to execute the optimization problem without requiring complex real-time setup.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If different circuit configurations are used for chips located on the periphery or inside the array, then the neural network can accommodate varying connection requirements, but the manufacturing complexity and resource requirements increase

Engineering Contradiction:
Improveconnection flexibility for different array positionsVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

All Ising devices in the array use the same homogeneous circuit configuration and can perform the same neuron circuit functions. The system achieves adaptability not through hardware differentiation but through software-controlled connection routing and weight configuration, allowing any Ising device to connect to any other device regardless of physical position.

Inventive Principle:
Principle #33Homogeneity

Data Source

PatentUS11275995B2Information processing apparatus, ising device, and control method for information processing apparatus
Publication Date: 2022.03.15 FUJITSU LTD
  • US11275995B2 patent drawing
  • US11275995B2 patent drawing
  • US11275995B2 patent drawing

AI summary

An individual ising device connected to common buses includes neuron circuits, a memory, and a router. The memory holds connection destination information per neuron circuit. An individual item of connection destination information includes first address information identifying one of a plurality of connection destination neuron circuits of a neuron circuit and second address information identifying a first ising device including at least one of the connection destination neuron circuits, the first and second address information being correlated. The router supplies, when an output signal of a connection destination neuron circuit changes and when the router receives the first address information identifying this connection destination neuron circuit via a bus, an update signal based on the changed output signal to one of the neuron circuits in accordance with the received first address information, the previously specified second address information identifying the first ising device, and the connection destination information.