Island Bit-Line Contact Pads for Flexible 3D Line Routing
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Solution Overview
Problem
Current semiconductor devices face limitations in the degree of freedom for line connections, which restricts the integration and efficiency of three-dimensional memory cell arrays and logic circuits.
Innovation Solution
The semiconductor device incorporates a bit-line contact pad with an island shape, electrically coupling bit lines to lower connection structures through a series of connection patterns, allowing for improved connectivity and flexibility in line connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional line connection structures are used in 3D semiconductor devices, then the device structure is simple, but the degree of freedom in line connections is limited
Solution Approach 1:
The patent transitions from planar 2D connection structures to three-dimensional 3D connection structures by stacking multiple connection patterns in vertical layers. Bit-line contact pads are positioned at different heights (first layer, second layer, third layer) to establish complex electrical connections that cannot be achieved in a single plane, thereby increasing connection freedom without proportionally increasing lateral complexity.
Solution Approach 2:
The connection structure is divided into multiple independent segments: first connection patterns, second connection patterns, third connection patterns, and bit-line contact pads, each forming separate functional units. These segmented elements can be independently designed and positioned in different spatial locations, allowing flexible routing of bit lines to various memory cell regions without requiring a monolithic connection structure.
2Adaptability or versatility
If more connection patterns are added to improve line connection flexibility, then connection freedom increases, but manufacturing complexity increases
Solution Approach 1:
Multiple connection patterns are nested vertically within each other across different layers. The first connection patterns are positioned in a first layer, second connection patterns in a second layer, and third connection patterns in a third layer, with each layer containing embedded contact pads. This nested arrangement allows complex multi-point connections to be achieved through vertical stacking rather than lateral expansion, reducing the overall footprint and simplifying alignment requirements compared to planar alternatives.
Data Source
AI summary
A semiconductor device includes a first connection pattern; a bit line disposed over the first connection pattern in a vertical direction; and a bit-line contact pad, disposed in a first layer between the bit line and the first connection pattern to electrically couple the bit line to the first connection pattern, and formed as an island when viewed along the vertical direction. A predetermined number of the bit-line contact pads are spaced apart from each other by a predetermined distance in a first direction, when viewed along the vertical direction.