Isochronous Clock Synchronization via Phase Pre-Control
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Solution Overview
Problem
Existing methods for synchronizing an isochronous base clock system with a higher-level clock system often result in errors due to sudden changes in clock period and jitter, leading to potential disruptions in communication and automatic shutdown of production machines.
Innovation Solution
A method involving two steps: 'snapping' where the phase difference between the base clock system and the higher-level clock system is determined and kept constant, followed by 'pull-in' where a calculated phase shift is applied simultaneously across all components to synchronize with the higher-level clock system, ensuring continuous and error-free communication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a phase shift is applied to synchronize the base clock system with the higher-level clock system, then synchronization accuracy is improved, but sudden changes in clock period cause communication errors and system disruptions
Solution Approach 1:
The patent applies preliminary action by calculating the required phase shift in advance and distributing it as a pre-control value to all clock generators before the actual synchronization event. This allows the system to prepare for the phase change without sudden disruptions, as each component knows its target adjustment beforehand.
Solution Approach 2:
The patent implements dynamics by transitioning from a static phase shift approach to a dynamic two-step process: first distributing the calculated phase shift as pre-control, then activating it simultaneously across all components. This dynamic approach allows the system to adapt to synchronization requirements while maintaining operational continuity.
2Device complexity
If traditional synchronization methods are used, then system complexity is reduced, but jitter and sudden clock period changes cause errors and automatic shutdowns
Solution Approach 1:
The patent applies segmentation by dividing the synchronization process into two distinct phases: a first step for distributing the calculated phase shift as pre-control to all components, and a second step for activating the phase shift simultaneously. This segmentation allows complex synchronization to be managed through simpler, sequential operations.
Solution Approach 2:
The patent introduces an intermediary mechanism by using a calculated phase shift value as a mediator between the higher-level clock system and the base clock system components. This intermediary value is distributed and activated in a controlled manner, preventing direct sudden changes that would cause disruptions.
3Speed
If the phase shift is applied immediately to all components, then synchronization speed is improved, but communication errors occur due to simultaneous clock period changes
Solution Approach 1:
The patent applies preliminary action by calculating and distributing the phase shift value to all clock generators before the actual synchronization event. This pre-distribution allows all components to be prepared simultaneously, enabling fast activation without communication errors during the transition.
Data Source
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AI summary
The invention is a method for synchronizing a basic clock system (10) comprising several synchronized components (12-18) with a higher-level clock system (30), wherein in a first step of the synchronization a phase difference (36) between an actual phase (32) of the basic clock system (10) and a target phase (34) of the higher-level clock system (30) is determined and the phase difference (36) is transmitted to the components (12-18) of the basic clock system (10) and wherein in a second step of the synchronization the determined phase difference (36) is used as feedforward control of each component (12-18), namely for feedforward control of a clock generator of each component (12-18).