Isolated Contacts in Stacked VTFETs via Dielectric Segmentation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Stacking planar FETs is challenging due to the need for multiple vertical layers of interconnects, which complicates the formation of isolated contacts necessary for vertical transport field effect transistors (VTFETs).
Innovation Solution
The formation of isolated contacts in a stacked VTFET design, where a second VTFET is vertically stacked with a first VTFET, with the second contact at least partially overlapping the first contact and electrically isolated from it, allowing for efficient interconnects in a semiconductor structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple vertical layers of interconnects are used to stack planar FETs, then vertical stacking is achieved, but the formation of isolated contacts becomes complicated
Solution Approach 1:
The patent transitions from planar FET stacking requiring multiple vertical interconnect layers to VTFET stacking where contacts are formed in the same vertical plane. The VTFET structure allows contacts to be positioned at different vertical heights (z-position) within the same layer, eliminating the need for multiple stacked interconnect layers and simplifying contact isolation formation.
Solution Approach 2:
The contact structure is segmented into multiple VTFETs within the same layer, each with its own isolated contact. The contacts are separated by dielectric material, allowing independent formation and isolation of each contact while maintaining vertical stacking efficiency without complex multi-layer interconnects.
2Area of stationary object
If VTFETs are vertically stacked with overlapping contacts, then area scaling is improved, but electrical isolation between contacts must be maintained
Solution Approach 1:
A dielectric material acts as an intermediary between the overlapping contacts of vertically stacked VTFETs. This dielectric layer is positioned between the contacts at different vertical positions, providing electrical isolation while allowing the contacts to overlap in the vertical projection, thus achieving area scaling without compromising isolation reliability.
Solution Approach 2:
The dielectric material is selectively placed only in the regions where contact overlap occurs, providing localized electrical isolation where needed. This allows the contacts to overlap in areas where isolation is required while maintaining direct metal-to-semiconductor contact where electrical connection is needed, achieving both area efficiency and reliability.
Data Source
AI summary
Structures and methods that facilitate forming isolated contacts in stacked vertical transport field effect transistors (VTFETs). A pair of stacked VTFETs are formed on a substrate and isolated from each other. A via or hole is formed to extend to a drain of the second VTFET and a source of the first VTFET. The via is filled with a metal below the first VTFET to form the second contact. The second contact is capped with a non-conductive material and the remaining portion of the via is filled with metal to form the first contact. Alternatively, a via or hole is formed to extend to a source of the second VTFET and a source of the first VTFET. The second contact may serve as a local interconnect, a ground, or a voltage source connection.