Isolated Driver Signal Decoding Across a Noisy Galvanic Barrier

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional isolated gate driver devices face issues with missing pulses and spurious spikes in differential signals due to noise, leading to incorrect signal decoding and unwanted commutations, which are mitigated by OOK modulation but introduce communication delays.

Innovation Solution

An improved isolated communication channel architecture that generates pulses at the edges of both the input signal and a clock signal, ensuring correct signal reconstruction even if a pulse is missed, using a pulse generator circuit and logic circuits to produce complementary signals and mask pulses, allowing for robust communication across a galvanic isolation barrier without high-frequency oscillators.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If OOK modulation is used to mitigate missing pulses and spurious spikes, then signal reliability is improved, but communication delay increases

Engineering Contradiction:
Improvesignal reliabilityVSAvoidcommunication delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies periodic action by using a clock signal with a higher frequency than the input signal to generate multiple pulses periodically. This periodic pulsing ensures that even if some pulses are missed due to noise, subsequent pulses will carry the same information, thereby maintaining signal reliability while reducing the need for complex OOK modulation and its associated delays.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent changes the frequency parameter by introducing a clock signal with a higher frequency than the input signal. This frequency parameter change allows the system to generate multiple pulses for each input signal edge, improving robustness against noise and reducing communication delays compared to OOK modulation.

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If pulses are generated only at input signal edges, then device complexity is reduced, but signal reconstruction reliability deteriorates when pulses are missed

Engineering Contradiction:
Improvedevice complexityVSAvoidsignal reconstruction reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent uses periodic action by generating pulses not only at input signal edges but also at clock signal edges. This periodic pulsing ensures redundant information transmission, so if a pulse is missed, the signal can still be reconstructed from subsequent pulses without increasing device complexity significantly.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies preliminary action by pre-generating clock signal pulses at known intervals before they are needed for signal reconstruction. This ensures that even if input signal edges are missed or corrupted, the clock-generated pulses are already available to maintain reliable signal reconstruction.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution ensures correct signal switching at the next available pulse, reducing communication delays and improving robustness against noise, without the need for high-frequency modulation, thus providing a faster and more reliable communication channel.

Implementation Method 1

A first capacitor having a first terminal coupled to a first output node of the transmitter circuit and a second capacitor having a first terminal coupled to a second output node of the transmitter circuit are provided. A differential signal is produced between a second terminal of the first capacitor and a second terminal of the second capacitor. The differential signal comprises a spike of a first polarity at each rising edge of the digital transmission signal and a spike of a second polarity at each falling edge of the digital transmission signal.

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentEP4376298A1Isolated driver device, corresponding electronic system and method of transmitting a data signal across a galvanic isolation barrier
Publication Date: 2024.05.29 STMICROELECTRONICS SRL
  • EP4376298A1 patent drawingFigure 1~2
  • EP4376298A1 patent drawingFigure 3~5
  • EP4376298A1 patent drawingFigure 6~8

AI summary

In an electronic device (10), a pulse generator (11) receives an input signal (tx_com) and a clock signal (clk) and produces a transmission signal (tx_in) that includes a pulse following each edge of the input signal and of the clock signal. The pulse is low when the input signal is low and high when the input signal is high. A transmitter (102) produces, at its two output nodes, a replica (com_p) of the transmission signal and the complement (com_n) of the transmission signal. A galvanic isolation barrier (103P, 103N) is coupled to the output nodes of the transmitter and produces a differential signal (Vd) that includes a positive spike at each rising edge of the transmission signal and a negative spike at each falling edge of the transmission signal. A first comparator (42) produces an intermediate set signal (set_inn) that includes a pulse at each positive spike of the differential signal. A second comparator (44) produces an intermediate reset signal (reset_inn) that includes a pulse at each negative spike of the differential signal. A final set signal (setn) is produced by activating masking of the intermediate set signal in response to a pulse of the intermediate reset signal, and de-activating said masking in response to the end of a pulse of the intermediate set signal or in response to a time interval (Tdly3) elapsing after a pulse of the intermediate reset signal. A final reset signal (resetn) is produced by activating masking of the intermediate reset signal in response to a pulse of the intermediate set signal, and de-activating masking of the intermediate reset signal in response to the end of a pulse of the intermediate reset signal or in response to a time interval elapsing after a pulse of the intermediate set signal. An output control circuit (46) asserts an output signal (rx_com) in response to a pulse of the final set signal and de-asserts the output signal in response to a pulse of the final reset signal.