Isolated-Gate Power MOSFET for Uniform Switching Timing
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Solution Overview
Problem
Current power MOSFET devices face challenges in uniform and simultaneous switching due to delays in control signal propagation, leading to localized high current densities and potential damage from excessive heating, with no simple and low-cost solutions for controlling signal propagation in power devices to achieve synchronized switching.
Innovation Solution
A power MOSFET device with an improved isolated-gate structure featuring a gate-oxide layer and polysilicon gate layer with silicide electrical-modulation regions, allowing for local modification of electrical resistance and precise control of switching times through the design of silicide regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional gate structure is used in power MOSFET devices, then the device can operate at high voltages and currents, but delays in control signal propagation occur leading to non-uniform switching across different regions
Solution Approach 1:
The gate structure is segmented into multiple independent gate regions (first gate region, second gate region, etc.) that can be controlled separately. Each gate region has its own gate electrode and gate insulation layer, allowing independent control of signal propagation timing to different regions of the semiconductor body, thereby achieving uniform switching across the entire device.
Solution Approach 2:
The invention transitions from a planar gate structure to a three-dimensional isolated gate structure where gate electrodes are positioned at different depths and locations. The gate electrodes extend into trenches or recesses in the semiconductor body, creating spatial separation that enables differentiated control signal propagation paths and timing for different regions.
2Power
If the active area of the power device is increased to handle higher power, then the power handling capability improves, but control signal propagation delays increase and localized high current densities occur
Solution Approach 1:
The large active area is divided into multiple independently controllable regions through segmented gate structures. Each region can be switched independently with optimized timing, allowing the entire device to handle high power while maintaining uniform switching across all regions, preventing localized high current densities.
Solution Approach 2:
Different regions of the semiconductor body can have locally optimized gate structures with varying dimensions, doping concentrations, or insulation layer thicknesses. This allows each region to be tailored for its specific function while maintaining overall device performance and switching uniformity across the entire active area.
3Ease of manufacture
If simpler gate structures are used to reduce manufacturing complexity, then manufacturing cost decreases, but control over signal propagation timing and switching uniformity is lost
Solution Approach 1:
The gate electrodes and gate insulation layers are formed in advance during the manufacturing process, with predetermined geometries and positions. This preliminary structuring enables precise control over signal propagation timing without requiring complex post-manufacturing adjustments or adjustments during operation.
Solution Approach 2:
The invention utilizes variations in geometric parameters (gate electrode dimensions, trench depths, spacing) and material parameters (insulation layer thickness, doping concentrations) to control signal propagation characteristics. These parameters can be precisely controlled during standard semiconductor manufacturing processes to achieve the desired switching timing without excessive complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables synchronous and homogeneous control of the power device, enhancing reliability and electrical performance by allowing for precise modulation of the gate voltage, reducing thermal breakdown, and improving manufacturing efficiency with a low-cost process.
Implementation Method 1
a plurality of silicide electrical-modulation regions, which enable local modification of the electrical resistance of the gate region
Data Source
AI summary
A power MOSFET device includes a semiconductor body having a first main surface. The semiconductor body includes an active area facing the first main surface. The power MOSFET device includes an isolated-gate structure, which extends over the active area and includes a gate-oxide layer, which is made of insulating material and extends over the first main surface, and a gate region buried in the gate-oxide layer so as to be electrically insulated from the semiconductor body. The gate region includes a gate layer of polysilicon and at least one first silicide electrical-modulation region and one second silicide electrical-modulation region, which extend in the gate layer so as to face a top surface of the gate layer and to be arranged alongside one another and spaced apart from one another in a first plane.