Isolated MOS Transistor Layout for Container Opening Detection
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Solution Overview
Problem
Existing methods for detecting whether a container has been opened, especially for valuable products, face challenges in accurately determining if a severed wire has been repaired, leading to false negatives when the container is opened and then resealed.
Innovation Solution
A system utilizing a MOS transistor with a gate in the first polysilicon level, electrically isolated from the substrate, and a detection device with capacitors and a measuring circuit to detect voltage changes indicative of wire severing or repair, ensuring accurate detection of container opening attempts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a MOS transistor uses a conventional single-polysilicon structure with the gate in the same polysilicon region as the source and drain, then the manufacturing process is simpler, but the transistor cannot be electrically isolated from the substrate which causes leakage currents
Solution Approach 1:
The transistor is divided into two separate polysilicon regions: a first polysilicon region containing the gate and a second polysilicon region containing the source and drain. This segmentation allows the gate to be electrically isolated from the substrate while maintaining proper transistor functionality, resolving the contradiction between electrical isolation and structural simplicity.
Solution Approach 2:
A dielectric layer is introduced as an intermediary between the first polysilicon region (gate) and the substrate. This dielectric layer provides the necessary electrical isolation, enabling the gate to be floating relative to the substrate while still allowing the transistor to operate correctly through the second polysilicon region.
2Reliability
If the first polysilicon region is heavily doped to improve gate control, then the gate efficiency improves, but leakage currents increase between source and drain
Solution Approach 1:
By separating the gate (in the first polysilicon region) from the source and drain (in the second polysilicon region), the patent allows the first polysilicon region to be heavily doped for improved gate control without directly causing leakage between source and drain, as the dielectric layer and spatial separation prevent this harmful effect.
Solution Approach 2:
Different doping levels are applied to different regions: the first polysilicon region (gate) is heavily doped for efficient gate control, while the second polysilicon region (source and drain) is lightly doped to minimize leakage currents. This local differentiation resolves the contradiction between gate efficiency and leakage reduction.
Data Source
AI summary
An integrated circuit includes a first substrate. A MOS transistor has a first polysilicon region electrically isolated from the first substrate and including a gate region. A second polysilicon region is electrically isolated from the first polysilicon region and from the first substrate. The second polysilicon region includes a source region, a substrate region and a drain region of the MOS transistor. The first polysilicon region is located between an area of the first substrate and the second polysilicon region.