Isolated PWM Edge Driver for Pulse Width Fidelity
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Solution Overview
Problem
Existing analog signal amplification circuits, such as class D amplifiers, face challenges in accurately preserving the pulse width of input pulse width modulation (PWM) signals, leading to potential loss of information fidelity in the amplified output.
Innovation Solution
The proposed isolation driver circuit includes rising and falling edge detection circuits and a decoder, which use multiple clock signals to accurately detect and replicate the rising and falling edges of the input PWM signal, ensuring that the pulse width is preserved with high fidelity in the output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional analog signal amplification circuits are used, then power amplification is achieved, but pulse width preservation and information fidelity deteriorate
Solution Approach 1:
The amplification process is segmented into distinct stages: PWM generation, capacitive isolation, edge detection, and pulse reconstruction. Each stage handles specific aspects of signal processing independently, allowing power amplification through capacitance while preserving pulse width characteristics through dedicated detection and reconstruction circuits.
Solution Approach 2:
A capacitor is introduced as an intermediary element between the input and output circuits. This capacitor enables power transfer and electrical isolation while maintaining signal integrity. The capacitor charges and discharges in response to PWM edges, facilitating power amplification without directly coupling the input and output signal paths, thus preserving pulse width fidelity.
2Reliability
If electrical isolation is implemented using capacitive coupling, then power source isolation is achieved, but signal fidelity and pulse width accuracy may deteriorate
Solution Approach 1:
Edge detection circuits monitor the PWM signal transitions and generate corresponding output edges with precise timing. The system effectively uses feedback mechanisms where the detection of rising and falling edges triggers precise output responses, ensuring that pulse width accuracy is maintained despite the capacitive isolation that provides power source independence.
Solution Approach 2:
The patent replaces direct electrical coupling (mechanical/electrical connection) with capacitive coupling combined with edge detection logic. Instead of maintaining a direct signal path that would compromise isolation, the system uses capacitive energy transfer paired with temporal edge detection and reconstruction, substituting direct electrical continuity with a timing-based control mechanism that preserves both isolation and accuracy.
3Device complexity
If simple amplification circuits are used, then device complexity is reduced, but information fidelity and pulse width preservation deteriorate
Solution Approach 1:
The patent extracts the essential information from the PWM signal by focusing solely on detecting rising and falling edges rather than processing the entire continuous signal waveform. This extraction approach isolates the critical timing information needed for pulse width preservation, achieving high information fidelity with relatively simple edge detection circuits rather than complex full-signal processing systems.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively preserves the pulse width of the input PWM signal in the output, enhancing the fidelity of information transmission and enabling high-power driving of the output signal while maintaining isolation from the input signal's power source.
Implementation Method 1
outputs corresponding rising edge detection signals that are capacitively isolated from the input pulse width modulation signal
Implementation Method 2
outputs corresponding falling edge detection signals that are capacitively isolated from the input pulse width modulation signal
Data Source
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AI summary
An isolation driver circuit (200) for a pulse width modulation signal. The isolation driver circuit includes a rising edge detection circuit (210), a falling edge detection circuit (220), and a decoder (130). The rising edge detection circuit (210) and the falling edge detection circuit (220) respectively detect rising edges and falling edges of the input pulse width modulation signal (101), and respectively output corresponding rising edge detection signals and falling edge detection signals (112, 122) that are capacitively isolated (213, 214, 223, 224) from the input pulse width modulation signal (101). The decoder (130) receives the rising edge detection signals (112) and the falling edge detection signals (122), and outputs respective rising edges and falling edges of an output pulse width modulation signal (102) that temporally align with the respective rising edges and falling edges of the input pulse width modulation signal (101). Thus, information stored in the pulse widths of the input pulse width modulation signal are preserved with high fidelity in the output pulse width modulation signal.