DC-Isolated Receiver Node Biasing for Offset Voltage Cancellation
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Solution Overview
Problem
Proximity communication systems face challenges in achieving reliable signal detection due to floating receive nodes experiencing DC wander and significant offset voltages, which reduce signal integrity and require large input transistors, leading to performance bottlenecks and increased power consumption.
Innovation Solution
The system addresses this by connecting floating nodes to a predetermined potential through large resistive elements, such as MOS transistors, and utilizing feedback circuitry to cancel offset voltages, thereby reducing the loading on sensitive nodes and improving signal sensitivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If proximity communication uses capacitive coupling to enable direct chip-to-chip communication, then communication speed and integration density are improved, but DC isolation causes floating nodes to experience DC wander and offset voltages that degrade signal integrity
Solution Approach 1:
A virtual ground node is introduced as an intermediary between the capacitive coupling elements and the amplifier inputs. This virtual ground serves as a reference potential that stabilizes the floating nodes, preventing DC wander while maintaining the high-speed capacitive coupling communication functionality.
Solution Approach 2:
The patent creates a virtual equipotential surface at the amplifier input by using operational amplifiers configured as voltage followers. These amplifiers actively maintain their input nodes at a constant potential (virtual ground), eliminating the DC voltage drift that would otherwise occur on the floating nodes caused by capacitive isolation.
2Measurement precision
If large input transistors are used to compensate for offset voltages on floating nodes, then signal detection capability is improved, but device area and power consumption increase
Solution Approach 1:
A virtual ground intermediary is introduced that actively stabilizes the DC potential at the amplifier input. This eliminates the need for oversized input transistors that would otherwise be required to counteract offset voltages, thereby reducing device area while maintaining signal detection capability.
Solution Approach 2:
The patent replaces the mechanical/transistor-based offset compensation approach (using large transistors) with an electronic/voltage-based approach (virtual ground using operational amplifiers). This substitution achieves the same offset compensation function with smaller devices and lower power consumption.
3Adaptability or versatility
If floating nodes are left isolated to maintain capacitive coupling integrity, then communication functionality is preserved, but DC wander and offset voltages accumulate that reduce system reliability
Solution Approach 1:
The virtual ground acts as a mediator that connects the isolated floating nodes to a stable reference potential without disrupting the capacitive coupling. This allows the nodes to remain electrically isolated for communication purposes while simultaneously providing DC stability through the virtual ground reference.
Solution Approach 2:
Operational amplifiers configured as voltage followers provide negative feedback to maintain the virtual ground potential. The amplifiers continuously monitor and adjust their output to keep the input nodes at the desired potential, thereby actively compensating for any DC wander or offset voltages that develop on the floating nodes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the sensitivity and performance of proximity communication systems by effectively canceling offset voltages, reducing the size of input devices, and improving alignment tolerances, leading to increased reliability and reduced power consumption.
Implementation Method 1
corresponding arrays of electrode plates or pads are formed in the opposing surfaces of the two chips, which are then fixed together with a dielectric layer in between to form a large number of capacitively coupled communication links between the chips
Implementation Method 2
connect the non-inverting input to a virtual ground node through a first large resistive element and connect the inverting input to a virtual ground node through a second large resistive element
Implementation Method 3
connect the output of the first operational amplifier to the non-inverting input of the first operational amplifier and connect the output of the second operational amplifier to the inverting input of the second operational amplifier
Data Source
AI summary
Offset voltages developed on floating nodes on inputs to high-performance amplifiers that are DC isolated from the data signals input to amplifiers are cancelled by connecting a highly resistive element between the input node and a predetermined potential, particularly useful in proximity communication systems in which two chips are connected through capacitive or inductive coupling circuits formed jointly in the two chips. The resistive element may be an off MOS transistor connected between the node and a desired bias voltage or a MOS transistor with its gate and drain connected to the potential. Multiple bias voltages may be distributed to all receivers and locally selected by a multiplexer for application to one or two input nodes of the receiver. The receiver output can also serve as a predetermined potential when the resistive element has a long time constant compared to the data rate or the resistive element is non-linear.