Integrated Circuit Decoy Structure Using Isolated Silicided Sectors

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Integrated circuits are vulnerable to reverse engineering due to the ease with which their components can be identified and understood, necessitating the incorporation of decoy structures that mimic functional components without actually being operational.

Innovation Solution

Incorporation of decoy structures within the integrated circuit, specifically a silicided sector electrically isolated from the substrate, which appears as operational components like transistors or resistors but lacks electrical contact, thereby misleading reverse engineers while having minimal impact on neighboring components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If decoy structures are incorporated into the integrated circuit to complicate reverse engineering, then the security against reverse engineering is improved, but the device complexity increases

Engineering Contradiction:
Improvesecurity against reverse engineeringVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates decoy structures that are visual copies of functional transistor components (gate, source, drain regions) but are electrically isolated from the substrate. These copies mimic the appearance of real components in SEM images while containing no operational circuitry, thereby complicating reverse engineering without adding functional complexity

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The patent introduces an isolating layer as an intermediary element between the decoy silicided sector and the substrate. This intermediary layer electrically isolates the decoy structure from the substrate while allowing the decoy to maintain its visual appearance as a functional component, thus resolving the contradiction between security enhancement and complexity addition

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If decoy structures are incorporated to mislead reverse engineers, then the security is improved, but the manufacturing complexity increases

Engineering Contradiction:
Improvesecurity against reverse engineeringVSAvoidease of manufacture
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent merges the formation of decoy structures with existing manufacturing processes. The isolating layer is integrated into the existing CESL (contact etch stop layer) structure, and the decoy silicided sectors are formed using standard silicidation processes already employed for functional components, thereby minimizing additional manufacturing complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The isolating layer serves multiple functions: it acts as the CESL for contact etching in functional areas and simultaneously provides electrical isolation for the decoy structures. This multi-functionality reduces the need for additional specialized layers or processes, improving ease of manufacture while maintaining security

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If decoy structures are added to complicate reverse engineering, then the security is improved, but the area occupied increases

Engineering Contradiction:
Improvesecurity against reverse engineeringVSAvoidarea occupied
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent applies local quality by creating small, localized decoy structures (silicided sectors) that are electrically isolated only in specific areas where they are needed for security. The isolating layer is applied selectively to create these local decoys without affecting the overall circuit layout or requiring large additional areas

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12051656B2Integrated circuit containing a decoy structure
Publication Date: 2024.07.30 STMICROELECTRONICS (ROUSSET) SAS
  • US12051656B2 patent drawing
  • US12051656B2 patent drawing
  • US12051656B2 patent drawing

AI summary

An integrated circuit includes a substrate, an interconnection part, and an isolating region located between the substrate and the interconnection part. A decoy structure is located within the isolating region and includes a silicided sector which is electrically isolated from the substrate.