Isolated Switch Bias Circuitry for RF Noise Reduction
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Solution Overview
Problem
Radio-frequency (RF) switches suffer from noise interference due to clock-based bias circuitry, which degrades receiver sensitivity and increases insertion loss.
Innovation Solution
A switch bias control circuit with isolated voltage regulators and a level shifter is used to provide separate voltage outputs for RF switch gate bias and clock circuitry, reducing noise by decoupling clock noise sources from the RF switch gate bias circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If clock-based bias circuitry is used to control RF switches, then switching operation is achieved, but clock noise is generated that degrades receiver sensitivity and increases insertion loss
Solution Approach 1:
The bias circuitry is divided into separate positive and negative voltage generator circuits with isolated output nodes. This segmentation isolates the noise sources in each generator from the RF switch gate bias circuitry, preventing clock noise from degrading receiver sensitivity while maintaining switching operation.
Solution Approach 2:
The harmful clock noise is extracted and isolated from the RF switch gate bias path by using separate positive and negative voltage generators with isolated output nodes. The noise remains in the voltage generator circuits while the clean bias voltage is delivered to the switch gates.
2Reliability
If series blocking capacitors are used to reduce clock noise, then receiver sensitivity improves, but device complexity and insertion loss increase
Solution Approach 1:
The need for series blocking capacitors is eliminated by extracting and isolating the noise sources in separate positive and negative voltage generators. The isolated output nodes deliver clean bias voltage directly to the RF switch gates without requiring additional blocking capacitors, reducing circuit complexity while maintaining receiver sensitivity.
3Reliability
If series blocking capacitors are used to reduce clock noise, then receiver sensitivity improves, but insertion loss increases
Solution Approach 1:
The series blocking capacitors are eliminated by extracting and isolating noise sources in separate voltage generators with isolated output nodes. This direct coupling approach removes the capacitive impedance that causes insertion loss, delivering clean bias voltage without energy loss while maintaining receiver sensitivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively reduces clock noise in RF switches, improving receiver sensitivity and reducing insertion loss without requiring series blocking capacitors.
Implementation Method 1
voltage regulator circuitry configured to receive a voltage reference signal, provide a first voltage output at a first node and provide a second voltage output at a second node
Implementation Method 2
a level shifter, voltage regulator circuitry configured to receive a voltage reference signal
Implementation Method 3
the first node and the second node being at least partially isolated from one another
Data Source
AI summary
A switch control circuit includes a positive voltage bias node, a voltage-regulated positive supply rail coupled to the positive voltage bias node, a charge pump coupled to a charge pump supply node, and a current source positive supply rail coupled to the charge pump supply node and configured to supply the charge pump.