Isolated Wells for Resistor Arrays Reduce Capacitive Coupling
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Solution Overview
Problem
Integrated circuits with resistor arrays face limitations due to capacitive coupling between resistors, which restricts their functionality and simulation accuracy, as resistors are typically coupled through contiguous wells in the substrate, leading to reduced performance when not all resistors are used simultaneously.
Innovation Solution
Forming non-contiguous or isolated wells beneath the resistor array to reduce capacitive coupling, allowing for more flexible circuit designs and accurate simulations by positioning each resistor over an isolated well, thereby minimizing electrical interaction between resistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If contiguous wells are used to support resistor arrays, then manufacturing simplicity is maintained, but capacitive coupling between resistors increases, limiting circuit functionality and simulation accuracy
Solution Approach 1:
The patent divides the substrate into multiple isolated wells instead of using a single contiguous well. Each well is separated by isolation regions, creating independent capacitive environments for individual resistors. This segmentation eliminates unwanted capacitive coupling between resistors while maintaining manufacturing feasibility through standardized isolation processes.
2Measurement precision
If isolated wells are formed to reduce capacitive coupling, then simulation accuracy and individual resistor control improve, but manufacturing complexity increases
Solution Approach 1:
The patent introduces isolation regions as intermediary structures between adjacent wells. These isolation regions act as mediators that electrically separate the wells while providing a continuous physical structure that simplifies manufacturing. The isolation regions can be formed using standard dielectric materials and processes, bridging the gap between complex electrical isolation requirements and simple fabrication processes.
3Adaptability or versatility
If resistors are positioned over isolated wells, then capacitive coupling is reduced and individual resistor control is enabled, but device area increases
Solution Approach 1:
The patent applies local quality by providing isolation regions only where needed between adjacent wells, rather than uniformly across the entire substrate. This allows capacitive decoupling to be implemented locally at critical interfaces while minimizing the overall area penalty. The isolation regions are positioned precisely where capacitive coupling would occur, providing targeted solutions without unnecessary area consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the accuracy of circuit simulations by allowing individual control of resistors and reduces capacitive coupling, enabling more reliable performance and flexibility in circuit designs.
Implementation Method 1
Conductive lines, such as those used for resistors, may form capacitive coupling with the substrate below the ILD layer. The n-well may provide a common capacitive coupling for an array of resistors.
Data Source
AI summary
A method performed by a computing system includes receiving a circuit design, the circuit design comprising a plurality of non-contiguous doped wells within a substrate and a plurality of resistor elements positioned above the plurality of non-contiguous doped wells such that each of the resistor elements is positioned above a different one of the plurality of non-contiguous doped wells and simulating performance of the circuit design with a first voltage applied to a first one of the plurality of resistor elements and a second voltage simultaneously applied to a second one of the plurality of resistor elements, the second voltage being different than the first voltage.