Isolation Circuit for Shared Wake Signals in Low-Power Components

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Solution Overview

Problem

In complex systems like large format printers, shared interconnect signals can cause parasitic voltage to be supplied to subsystems in an off state, leading to power consumption issues and erratic functionality due to the sharing of power states among subsystems.

Innovation Solution

Implementing isolation circuitry that separates signal coupling between subsystems with different power modes, using a single shared line for managing wake signals, which automatically isolates components in low power or off modes without complex control logic, thereby preventing parasitic power supply.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If shared interconnect signals are used to manage wake signals between subsystems, then system complexity is reduced and ease of operation is improved, but parasitic voltage is supplied to subsystems in off state causing power consumption and reliability deterioration

Engineering Contradiction:
Improveelectronics architecture complexityVSAvoidsystem reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

An isolation circuit is introduced as an intermediary component between subsystems sharing interconnect signals. The isolation circuit includes a first transistor coupled to the interconnect signal line and a second transistor coupled to the power supply of the first subsystem. These transistors act as mediators that control the flow of voltage and signals, preventing parasitic voltage from reaching subsystems in off state while maintaining the benefits of shared signal lines for wake management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If subsystems share power states through common interconnect signals, then ease of operation is improved, but parasitic power supply occurs leading to harmful effects in off-state subsystems

Engineering Contradiction:
Improvewake signal managementVSAvoidparasitic voltage and power consumption
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The isolation circuit serves as a mediator that allows wake signals to be shared among subsystems while blocking parasitic voltage. The first transistor couples the interconnect signal line to the second transistor, which in turn couples to the power supply. This intermediary arrangement enables the second subsystem to wake up the first subsystem through the shared line without allowing the first subsystem's power supply to create parasitic voltage in the second subsystem when it is in off state.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The isolation circuit applies local quality control by selectively enabling or disabling the coupling between subsystems based on their power states. The transistors in the isolation circuit can be controlled to conduct or block current flow locally at specific points in the circuit, allowing wake signals to pass through while preventing parasitic voltage from affecting subsystems that should remain in off state.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8766673B2Systems with components operable in low power modes
Publication Date: 2014.07.01 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US8766673B2 patent drawing
  • US8766673B2 patent drawing
  • US8766673B2 patent drawing

AI summary

A system comprises a first component operable in a plurality of modes coupled to a second component via an isolation circuit. The isolation circuit comprises a first diode coupled between a power supply of the first component and an output of the isolation circuit. The output of the isolation circuit is coupled to the second component.The isolation circuit also comprises a first transistor the base of which is coupled to an output of the first component and one of the collector and emitter of which is coupled to the output of the isolation circuit.In a low power mode of the first component, parasitic supply from the output of the isolation circuit is blocked from the power supply of the first component and from the output of the first component by the first transistor and the first diode.