Isolation Circuitry for Masking Power Consumption in Processing Circuits
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Solution Overview
Problem
Existing techniques, such as charge-pump systems, are inadequate in completely masking power consumption characteristics of processing circuitry from differential power analysis (DPA) attacks, allowing potential extraction of secret keys, and incur high power overhead and increased component costs.
Innovation Solution
The implementation of isolation circuitry with a plurality of sub-circuits, each comprising a capacitor, switches, and a comparator that stops discharge when a predetermined non-zero voltage is reached, ensuring consistent final voltage and masking power consumption patterns, thereby preventing DPA attacks while reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the capacitor is discharged to ground for an extended period to reduce voltage variation, then the masking effect improves, but the power consumption and component size increase
Solution Approach 1:
The capacitor is discharged only partially to a predetermined voltage level rather than completely to ground. This partial discharge action achieves sufficient masking effect while avoiding the excessive power consumption and component sizing that would result from complete discharge over extended periods
Solution Approach 2:
A comparator monitors the capacitor voltage and provides feedback control to stop the discharge process when the predetermined voltage level is reached. This feedback mechanism ensures consistent masking effect while preventing excessive discharge that would waste power and require larger components
2Reliability
If the discharge period is extended to reduce voltage variation, then the masking effect improves, but the area overhead increases due to larger capacitor and discharge transistor
Solution Approach 1:
Partial discharge to a predetermined voltage level achieves adequate masking effect without requiring the extended discharge period that would necessitate larger capacitor and transistor sizes, thereby reducing area overhead
Solution Approach 2:
The comparator-based feedback control enables precise termination of discharge at the predetermined voltage level, achieving consistent masking效果 with a fixed-size capacitor and transistor, avoiding the area overhead that would result from oversizing components to accommodate extended discharge periods
3Reliability
If multiple capacitors and switching elements are added to support multiple discharge phases, then the masking effect improves, but the cost and power consumption increase
Solution Approach 1:
A single capacitor with partial discharge capability achieves the masking effect without requiring multiple capacitors and associated switching elements, thereby reducing device complexity and component count
Solution Approach 2:
The comparator-based feedback control enables a single capacitor to achieve consistent masking效果 that would otherwise require multiple capacitors operating in different phases, significantly reducing the number of components needed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively protects processing circuitry from DPA attacks by maintaining consistent power consumption observations, significantly reducing power overhead and component costs compared to prior art, while ensuring the secret key remains undetectable.
Implementation Method 1
a capacitor; a first switch configured to provide a first connection between said capacitor and said power supply; a second switch configured to provide a second connection between said capacitor and an output to said processing circuitry
Implementation Method 2
a comparator configured to place said third switch in an open state when a predetermined non-zero voltage difference across said capacitor is reached during the active state of the third switch
Data Source
AI summary
An isolation circuitry and method are provided for coupling between a power supply and processing circuitry in order to provide power to the processing circuitry whilst hiding a power consumption characteristic of that processing circuitry. The isolation circuitry comprises a plurality of sub-circuits, with each sub-circuit comprising a capacitor, a first switch configured to provide a first connection between the capacitor and the power supply, a second switch configured to provide a second connection between the capacitor and the processing circuitry, and a third switch configured to provide a third connection across the capacitor to partially discharge the capacitor. Control circuitry controls the plurality of sub-circuits, such that within each sub-circuit the first switch, second switch and third switch are placed in an active state in a repeating sequence. Each of the plurality of sub-circuits further comprises a comparator configured to place the third switch in an open state when a predetermined non-zero voltage difference across the capacitor is reached during the active state of the third switch. By such an approach, it is ensured that the voltage across the comparator at the end of the discharge operation is always the same irrespective of the voltage present at the start of the discharge operation. As a result, the power consumption characteristic of the processing circuitry is entirely hidden by the isolation circuitry. Further, the isolation circuitry of the present invention provides a particular power efficient mechanism for hiding the power consumption characteristic of the processing circuitry.