Isolation Trench Etch Profile for Short-Channel Control in GAA FETs
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Solution Overview
Problem
The scaling down of transistor gate lengths leads to short-channel effects such as Drain-Induced Barrier Lowering and degradation of sub-threshold slope, compromising current flow control and transistor performance.
Innovation Solution
The formation of gate all around (GAA) transistor structures with convex bottom surfaces and straight sidewalls, achieved through a series of etching processes and deposition of isolation structures, improves current leakage in source/drain epitaxial structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If transistor gate lengths are scaled down to increase drive current, then transistor performance is improved, but short-channel effects such as Drain-Induced Barrier Lowering and degradation of sub-threshold slope occur, compromising current flow control
Solution Approach 1:
The patent transitions from planar transistors to three-dimensional gate-all-around (GAA) nanosheet structures. By wrapping the gate electrode around the channel on all sides (top, bottom, and sidewalls), the control mechanism extends into the vertical dimension, achieving superior electrostatic control and suppressing short-channel effects while maintaining scaled dimensions.
Solution Approach 2:
The GAA structure implements a nested configuration where the channel is surrounded by the gate electrode, which is in turn surrounded by the isolation trench. This nested arrangement allows the gate to control the channel from multiple directions, enhancing the ability to regulate current flow despite reduced gate length.
2Ease of manufacture
If conventional etching processes are used for isolation trench formation, then manufacturing simplicity is maintained, but poor etch profile control leads to undesirable trench shapes that exacerbate short-channel effects
Solution Approach 1:
The patent modifies etching process parameters including gas composition (using CF4 with O2 or CO), pressure, power, and temperature to achieve anisotropic etching. These parameter changes enable precise control of the etch profile, producing trenches with vertical sidewalls and convex bottoms that provide optimal isolation while maintaining manufacturing feasibility.
Solution Approach 2:
The patent introduces a sacrificial nanosheet layer that acts as an intermediary during the etching process. This sacrificial layer is selectively removed to define the trench shape, and its presence during etching helps achieve the desired convex bottom profile through self-aligned processes.
3Reliability
If isolation trench depth is increased to improve isolation effectiveness, then short-channel effects are reduced, but manufacturing complexity and difficulty increase
Solution Approach 1:
The patent performs preliminary actions by first forming the nanosheet structure and gate electrode before creating the isolation trench. The trench is then etched to a controlled depth below the nanosheet, and finally filled with isolation material. This sequence allows precise depth control without requiring excessively complex manufacturing steps.
Solution Approach 2:
The isolation trench formation is segmented into distinct stages: etching to a first depth to expose the nanosheet, selective removal of the nanosheet in the trench region, and filling with isolation material. This segmentation allows precise control of trench depth and profile while managing manufacturing complexity.
Data Source
AI summary
A device includes a substrate, a first fin, a second fin, a first isolation structure, a second isolation structure, and a gate structure. The first fin extends from a p-type region of the substrate. The second fin extends from an n-type region of the substrate. The first isolation structure is over the p-type region and adjacent to the first fin. The first isolation structure has a bottom surface and opposite first and second sidewalls connected to the bottom surface, a first round corner is between the bottom surface and the first sidewall of the first isolation structure, and the first sidewall is substantially parallel to the second sidewall. The second isolation structure is over the n-type region and adjacent to the first fin. The first isolation structure is deeper than the second isolation structure. The gate structure is over the first isolation structure and covering the first fin.