Semiconductor Isolation Trench and Poly Liner for Dense Memory Stacks

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Solution Overview

Problem

Existing semiconductor devices face challenges in achieving high integration density and reliability due to limitations in the design and materials used in the sealing and isolation structures.

Innovation Solution

The semiconductor device incorporates a substrate with a lower structure featuring a sealing layer and a support layer both made of semiconductor material, along with a mold structure having alternately stacked interlayer insulating and conductive films, channel holes, channel structures, isolation trenches, and poly liners extending along the sidewalls of these trenches, all made of semiconductor material.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional sealing and isolation structures are used, then device simplicity is maintained, but integration density and reliability are limited

Engineering Contradiction:
Improvedevice reliabilityVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies homogeneity by making the sealing layer and support layer both composed of semiconductor material (e.g., silicon), rather than using different materials. This uniform material composition improves interface compatibility and reduces defects at material boundaries, thereby enhancing reliability while maintaining structural simplicity.

Inventive Principle:
Principle #33Homogeneity

Solution Approach 2:

The patent employs composite materials by combining semiconductor material with insulating films and conductive films in the mold structure. The lower structure uses semiconductor material for both sealing and support functions, creating a composite system that achieves high reliability through material synergy rather than increased structural complexity.

Inventive Principle:
Principle #40Composite materials

2Manufacturing precision

If more isolation trenches and poly liners are added, then defect reduction is achieved, but manufacturing complexity increases

Engineering Contradiction:
Improvefabrication precisionVSAvoidmanufacturing ease
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent applies segmentation by dividing the isolation structure into multiple trenches (first isolation trench, second isolation trench) with poly liners extending along their sidewalls. This segmented approach isolates different functional regions, reducing defect propagation and improving fabrication precision by containing potential issues within specific segments rather than affecting the entire device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The poly liner acts as an intermediary element between the isolation trenches and the surrounding semiconductor material. It provides a transition layer that reduces stress concentration and prevents direct contact between dissimilar materials, thereby reducing manufacturing defects while maintaining a relatively simple fabrication process.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If poly liners extend deeper into the substrate, then resistance issues are reduced, but fabrication difficulty increases

Engineering Contradiction:
Improveelectrical reliabilityVSAvoidfabrication complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by forming the poly liner structure before final device assembly and testing. The poly liners are extended along the sidewalls of isolation trenches and connected to the lower structure in advance, ensuring proper electrical connectivity and reducing resistance issues before subsequent fabrication steps are completed, thereby improving electrical reliability without significantly increasing overall fabrication complexity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12207467B2Semiconductor device
Publication Date: 2025.01.21 SAMSUNG ELECTRONICS CO LTD
  • US12207467B2 patent drawing
  • US12207467B2 patent drawing
  • US12207467B2 patent drawing

AI summary

A semiconductor device including a substrate; a lower structure including a sealing layer on the substrate and a support layer on the sealing layer, the sealing layer and the support layer both including a semiconductor material; a mold structure on the lower structure and having an interlayer insulating film and a conductive film alternately stacked therein; a channel hole penetrating the mold structure; a channel structure extending along sidewalls of the channel hole; an isolation trench penetrating the mold structure and extending into the lower structure; and a poly liner extending along sidewalls of the isolation trench, the poly liner being connected to the lower structure and including the semiconductor material.