Semiconductor Isolation Wiring Layout to Suppress Creeping Discharge
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Solution Overview
Problem
Semiconductor devices face challenges in transmitting signals between circuits with different potentials due to high humidity and high dielectric constant insulating films, leading to 'creeping discharge' and reduced breakdown voltage, which affects the reliability and efficiency of signal transmission.
Innovation Solution
The solution involves forming an opening portion in the organic insulating film to expose part of the inorganic insulating film between the wiring and inductors, reducing the dielectric constant in the discharge path and suppressing 'creeping discharge', and in the three-chip configuration, eliminating the organic insulating film on the transformer chip to prevent 'creeping discharge' and 'filler attack'.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an organic insulating film is formed between wiring and inductors, then insulation is provided, but creeping discharge occurs and breakdown voltage decreases
Solution Approach 1:
The patent removes the organic insulating film from the region between the first wiring and the inductor, extracting the harmful element (organic insulating film) that causes creeping discharge. This is achieved by forming an opening portion in the organic insulating film or by not forming it in the first place in that specific region, thereby eliminating the source of the problem while maintaining insulation elsewhere.
Solution Approach 2:
The patent applies different insulation strategies to different regions: inorganic insulating film is formed to cover the inductor and provide insulation where needed, while the organic insulating film is either removed or not formed in the specific region between the first wiring and inductor. This local differentiation of insulation quality prevents creeping discharge in critical areas while maintaining overall insulation integrity.
2Reliability
If inorganic insulating film is formed on inductors, then insulation and protection are provided, but manufacturing complexity increases
Solution Approach 1:
The patent combines the inorganic insulating film formation with existing manufacturing processes. The inorganic insulating film is formed to cover the inductor along with other insulating structures in a integrated manner, merging multiple functions (inductor insulation, wiring insulation, and protection) into a unified manufacturing approach that reduces overall complexity.
3Object-affected harmful factors
If organic insulating film is eliminated on transformer chip, then filler attack is prevented, but alternative protection is needed
Solution Approach 1:
The patent removes the organic insulating film from the transformer chip surface, extracting the element that attracts filler attack from mold resin. By eliminating this vulnerable organic layer, the chip becomes directly protected by the inorganic insulating film and underlying structures, preventing filler penetration and attack.
Solution Approach 2:
The patent employs a composite insulation structure combining inorganic insulating film and mold resin encapsulation. The inorganic insulating film provides a barrier against filler attack, while the mold resin provides overall encapsulation and protection, creating a multi-layer composite protection system that addresses both filler attack prevention and chip protection needs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the breakdown voltage and reliability of semiconductor devices by reducing 'creeping discharge' and 'filler attack', improving signal transmission between circuits with different potentials.
Implementation Method 1
a transformer (digital isolator) that enables contactless signal transmission using a pair of inductors coupled inductively
Data Source
AI summary
A semiconductor device includes a semiconductor substrate, a multilayer wiring layer formed on the semiconductor substrate, a first wiring formed on the multilayer wiring layer and configured to be applied with a first potential, an upper inductor formed on the multilayer wiring layer and configured to be applied with a second potential different from the first potential, an inorganic insulating film formed on the multilayer wiring layer, the first wiring, and the upper inductor, and an organic insulating film formed on the inorganic insulating film and disposed so as to cover the inorganic insulating film located between the first wiring and the upper inductor in plan view. Here, between the first wiring and the upper inductor, an opening portion exposing a part of the upper surface of the inorganic insulating film is formed in the organic insulating film.