Image Signal Processor Bit Extension for Noise Reduction

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Solution Overview

Problem

Existing image signal processors face challenges in reducing noise and tone jump during remosaic processing of RGBW patterns, especially in low-illuminance environments where random noise increases.

Innovation Solution

An image signal processor is designed with a bit extension processor that expands the number of bits of input data to include a decimal part, and an output circuit that adjusts the number of bits to generate output data, thereby reducing rounding errors and noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If pixels are miniaturized to increase resolution, then image detail is improved, but light incident per pixel is reduced causing increased noise

Engineering Contradiction:
Improveimage detailVSAvoidnoise
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent combines multiple pixels (2x2 block) to form a superpixel, merging their signals to increase the effective light collecting area. This allows miniaturized pixels to achieve sufficient signal levels by pooling photons across adjacent pixels, thereby reducing noise while maintaining high resolution through the merged superpixel structure.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If white filters are used to increase light transmittance, then sensitivity in low-illuminance is improved, but color information accuracy deteriorates

Engineering Contradiction:
ImprovesensitivityVSAvoidcolor information accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent applies different filter types strategically: white filters are placed in specific positions within the pixel array to maximize light collection in low-illuminance areas, while colored filters (RGB) are positioned where color accuracy is prioritized. This local differentiation allows each region to optimize for its specific function, achieving both sensitivity and color accuracy.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If remosaic processing is performed on RGBW patterns, then image quality is improved, but rounding errors cause tone jump and discoloration

Engineering Contradiction:
Improveimage qualityVSAvoidrounding error
Core Design Contradiction:
Measurement precisionVSLoss of information

Solution Approach 1:

The patent extends the bit depth dimension by adding a decimal part (fractional bits) to the data representation during remosaic processing. This dimensional extension in the numerical precision domain allows rounding errors to be pushed to a finer scale, reducing their visible impact on tone and color while maintaining processing accuracy.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Measurement precision

If bit depth is increased to reduce rounding errors, then processing precision is improved, but data processing complexity increases

Engineering Contradiction:
Improveprocessing precisionVSAvoiddata processing complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies bit extension selectively rather than uniformly across all data paths. By extending bits only where and when rounding errors are most critical (in the decimal part of intermediate calculations), the system achieves necessary precision without the full overhead of increased bit depth throughout the entire processing pipeline, thus balancing precision with complexity.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20250069187A1Image signal processor
Publication Date: 2025.02.27 SK HYNIX INC
  • US20250069187A1 patent drawing
  • US20250069187A1 patent drawing
  • US20250069187A1 patent drawing

AI summary

An image signal processor includes a bit extension processor configured to generate extension data by expanding, by a first number of bits, a number of bits of input data including a Bayer image and a white image, and an output circuit configured to adjust, upon receiving the extension data, the first number of bits to a second number of bits, to generate output data.