ISP Fault Detection Through Overlapping Image Tile Comparison

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Solution Overview

Problem

Verifying hardware components in image processing systems, particularly in safety-critical applications like automotive systems, is challenging due to complexity and computational demands, making it difficult to robustly detect hardware errors in real-time.

Innovation Solution

A method involving dividing an image into overlapping tiles, processing each tile using an image signal processor (ISP), calculating and comparing characteristics of the overlapping portions, and using cyclic redundancy checks to detect faults, which reduces computational requirements and enables detection of hardware faults in the ISP and other components.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If robust verification of all hardware components is performed in real-time, then reliability is improved, but device complexity and computational demands increase significantly

Engineering Contradiction:
Improvehardware verification reliabilityVSAvoidverification system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the image into multiple tiles with overlapping portions, processing each tile separately through the ISP and then comparing the overlapping regions. This segmentation approach allows verification of the ISP's processing consistency without requiring verification of all hardware components simultaneously, reducing overall system complexity while maintaining reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a copy of the image data by processing overlapping portions through the ISP and comparing the results. Instead of directly verifying all hardware components, the system copies the processing results from different ISP executions and compares them to detect faults, simplifying the verification process.

Inventive Principle:
Principle #26Copying

2Reliability

If comprehensive hardware verification is performed, then fault detection capability is improved, but computational requirements and processing time increase

Engineering Contradiction:
Improvefault detection capabilityVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By segmenting the image into tiles with overlapping portions and processing only these overlapping regions through the ISP, the patent reduces the computational workload compared to processing the entire image multiple times for verification. This maintains fault detection capability while improving processing speed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by focusing verification only on the overlapping portions of image tiles rather than the entire image. This partial verification approach provides sufficient fault detection capability for the ISP while significantly reducing computational requirements and processing time.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If image processing is performed on overlapping portions only, then computational overhead is reduced, but verification coverage may be limited

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidverification coverage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent segments the image into multiple tiles where overlapping portions are processed and compared. This segmentation ensures that verification coverage is distributed across different regions, and by comparing overlapping portions, the system achieves both computational efficiency and comprehensive verification coverage through the overlapping region comparisons.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260073499A1Image processing fault detection
Publication Date: 2026.03.12 NXP BV
  • US20260073499A1 patent drawing
  • US20260073499A1 patent drawing
  • US20260073499A1 patent drawing

AI summary

The disclosure relates to methods and systems for detecting faults in an image processing system, the image processing system comprising an image signal processor. An example method comprises: dividing an image into a first image tile and a second image tile, wherein the first image tile and the second image tile each comprise an overlapping portion of the image; processing the first image tile using the ISP to produce a first processed image tile comprising a first processed overlapping portion; processing the second image tile using the ISP to produce a second processed image tile comprising a second processed overlapping portion; calculating a characteristic of the first processed overlapping portion and calculating the same characteristic of the second processed overlapping portion; and comparing the characteristic of the first processed overlapping portion and the characteristic of the second processed overlapping portion.