Image Signal Processor Line-Level Multiplexing Reduces Power
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Solution Overview
Problem
Conventional image signal processors that perform time-division multiplexing on image data in units of frame data lead to increased power consumption due to bus transactions, as they require external frame memory access for processing multiple input images.
Innovation Solution
An image signal processor with a multiplexing control circuit that transmits and processes first and second line data in a time-division multiplexing mode, using internal buffers and line memory to minimize external memory access, and includes a switching control signal to determine which data to process, allowing for simultaneous processing of images from different imaging devices without relying on external frame memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If time-division multiplexing is performed on frame data using external frame memory, then multiple input images can be processed, but power consumption increases due to bus transactions
Solution Approach 1:
The patent segments frame data into line data units and performs time-division multiplexing at the line level rather than at the frame level. This allows selective transmission of line data to different processing circuits, reducing unnecessary bus transactions and external memory access while maintaining the ability to process multiple images
Solution Approach 2:
The patent introduces internal buffers as intermediary storage between the imaging devices and external frame memory. These buffers temporarily store line data, enabling the system to process multiple images without continuously accessing external memory through the bus, thus reducing power consumption
2Adaptability or versatility
If time-division multiplexing is performed on frame data, then multiple images can be processed, but system resources are excessively used due to bus transactions
Solution Approach 1:
By segmenting frame data into line data and performing multiplexing at the line level, the patent reduces the granularity of data transmission. This allows more efficient use of internal buffers and reduces the frequency of bus transactions, thereby decreasing system resource consumption while maintaining multi-image processing capability
Solution Approach 2:
The patent extracts the time-division multiplexing function from the external frame memory access path and implements it within the internal data processing path. This allows multiple images to be processed using internal buffers and processing circuits without relying on external memory access, reducing system resource usage
Data Source
AI summary
An image signal processor including a first data processing circuit, a second data processing circuit, and a multiplexing control circuit configured to transmit first line data included in first frame data and second line data included in second frame data to the first data processing circuit in a time-division multiplexing mode may be provided. The multiplexing control circuit may be further configured to transmit to the first data processing circuit a switching control signal, which indicates whether current line data to be transmitted to the first data processing circuit is the first line data or the second line data.