Iterative Error-Erasure Decoding With Adaptive Erasure Lists

The patent segments the decoding process into multiple iterations, where each iteration performs error-erasure decoding with a specific erasure list. The complex decoding task is divided into manageable stages, with each stage using reliability information to identify and correct errors systematically. This segmentation allows the system to achieve high error correction capability while keeping each individual decoding step computationally tractable.

The patent employs dynamic erasure list generation based on reliability information from the Viterbi detector. The erasure list is not fixed but adapts iteratively, with symbols being added or removed from the erasure list based on their reliability values. This dynamic approach allows the decoder to focus computational resources on the most unreliable symbols, improving error correction efficiency while reducing overall complexity.

The patent applies partial action by generating erasure lists of limited size L based on reliability thresholds, rather than considering all possible symbols. The decoder performs error-erasure decoding with a controlled number of erasures, which is sufficient to correct the actual error patterns present in the data. This partial approach achieves good error rate performance while significantly reducing the computational effort compared to exhaustive decoding methods.

The patent implements feedback mechanisms where reliability information from the Viterbi detector feeds into the erasure list generation, and decoding results feed back into subsequent decoding iterations. The system uses feedback from previous decoding attempts to adjust the erasure list for the next iteration, progressively improving error correction performance while avoiding redundant computational effort by focusing on symbols that actually need correction.

The patent designs the iterative error-erasure decoding system with multi-functional components that can perform multiple tasks. The same decoding hardware is reused across multiple iterations, with the erasure list being regenerated and updated rather than requiring separate decoding circuits for each iteration. This universal approach allows the system to achieve improved signal-to-noise ratio performance through multiple decoding passes while avoiding the hardware cost of duplicating the entire decoding circuitry.

The patent employs a strategy where intermediate results and reliability information are preserved and reused across iterations rather than discarded. The erasure lists from previous iterations are recovered and modified for subsequent iterations, allowing the system to build upon previous computational work. This approach improves signal-to-noise ratio performance through iterative refinement while reducing hardware requirements by avoiding redundant computation.