Iterative Error Correction Decoding for PCR Jitter Alignment

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Solution Overview

Problem

Conventional iterative decoding methods for digital terrestrial television broadcasting systems fail to adequately address data array discrepancies, leading to Program Clock Reference (PCR) jitter and degraded decoding quality, particularly due to unconsidered Transport Stream (TS) data array outputs from error correcting decoders, resulting in lip sync deviations in video images.

Innovation Solution

An error correcting decoder is designed with a first and second error correction decoding module, interleaving and delay modules, and a corrector to rearrange and delay data arrays, performing iterative decoding and correcting delays based on broadcasting system rules, specifically using byte interleaving and convolution coding ratios to compensate for transmission and reception delays across layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional iterative decoding method is used, then decoding process is simple, but PCR jitter occurs and decoding quality is degraded

Engineering Contradiction:
Improvedecoding qualityVSAvoiddecoder structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The decoder is divided into multiple functional modules: first error correction decoding module, interleaving module, delay module, second error correction decoding module, and corrector. Each module performs a specific function in the iterative decoding process, allowing complex operations to be organized into manageable segments that work together to resolve PCR jitter while maintaining decoding quality

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interleaving module performs preliminary rearrangement of the data array before the second error correction decoding. This preliminary action prepares the data in the correct order for subsequent decoding operations, preventing PCR jitter from occurring in the first place rather than correcting it afterward

Inventive Principle:
Principle #10Preliminary action

Solution Approach 3:

The corrector uses feedback from the decoded output to adjust and correct the data array order. By monitoring the output from the second error correction decoding module and comparing it against expected patterns, the system can identify and correct ordering errors that would otherwise cause PCR jitter, creating a closed-loop control system

Inventive Principle:
Principle #23Feedback

2Productivity

If data array is not rearranged in correct order, then processing is faster, but lip sync deviation occurs

Engineering Contradiction:
Improveprocessing speedVSAvoidsynchronization accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The delay module dynamically adjusts the timing of data packets based on their position in the transport stream. Rather than applying a fixed delay to all packets, the system calculates appropriate delays for each packet based on the interleaving pattern and packet position, allowing the system to maintain high processing speed while ensuring proper synchronization of video and audio data

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the order parameter of the data array through the interleaving module, which rearranges packets according to a specific pattern. This parameter transformation converts the incoming data stream into the correct order for decoding, preventing synchronization issues without requiring complex post-processing corrections

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8683287B2Error correcting decoder and receiving system
Publication Date: 2014.03.25 KK TOSHIBA
  • US8683287B2 patent drawing
  • US8683287B2 patent drawing
  • US8683287B2 patent drawing

AI summary

According to one embodiment, an error correcting decoder includes a first error correction decoding module, an interleaving module, a delay module, a second error correction decoding module, and a corrector. The first error correction decoding module performs a first error correction decoding to a received signal in accordance with a broadcasting system. The interleaving module rearranges a data array of an output of the first error correction decoding module in a second order. The data array is ordered in a first order which is reverse to the second order. The delay module delays the received signal by a processing time of the first error correction decoding module. The second error correction decoding module performs a second error correction decoding to an output of the interleaving module and an output of the delay module. The corrector configured to correct a delay of an output of the second error correction decoding module based on a packet position defined by the broadcasting system.