Iterative Detection Decoding Circuit MIMO Receiver Complexity

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Solution Overview

Problem

MIMO communication systems face increased demapping and decoding complexity and operational costs as the number of antennas, symbol bits, and code constraint length increase, limiting transmission performance.

Innovation Solution

An iterative detection and decoding (IDD) circuit and method that perform multiple outer and inner iterations on received MIMO signals, reducing operational complexity and improving packet error rate, specifically configured for MIMO receivers with plural antennas and a demapper to enhance transmission efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of transmission/reception antennas, symbol bits and code constraint length increase to meet high transmission rate requirements, then transmission rate is improved, but demapping and decoding complexity significantly increases

Engineering Contradiction:
Improvetransmission rateVSAvoiddemapping and decoding complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the iterative detection and decoding process into multiple outer iterations, where each outer iteration performs a limited number of inner iterations. This segmentation allows the system to achieve high transmission rates through multiple passes while controlling the computational complexity within each pass, preventing the exponential growth of operations that would occur with a single comprehensive iteration.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the number of outer iterations and inner iterations increase to improve packet error rate, then transmission reliability is improved, but operational complexity increases

Engineering Contradiction:
Improvepacket error rateVSAvoidoperational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a dynamic iteration structure where the number of inner iterations varies across different outer iterations. Specifically, earlier outer iterations perform more inner iterations to establish reliable initial estimates, while later outer iterations perform fewer inner iterations since the estimates are already refined. This dynamic adjustment optimizes the balance between packet error rate performance and operational complexity.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11431440B2Iterative detection and decoding circuit, iterative detection and decoding method and MIMO receiver
Publication Date: 2022.08.30 REALTEK SEMICON CORP
  • US11431440B2 patent drawing
  • US11431440B2 patent drawing
  • US11431440B2 patent drawing

AI summary

An iterative detection and decoding (IDD) circuit is provided. The iterative detection and decoding (IDD) circuit is configured to perform M outer iterations on a received signal, and Ni inner iterations are performed during the ith outer iteration of the M outer iterations, where M is an integer greater than 1, i is an integer less than or equal to M, and N1 to NM are integers and include at least two different values.