FEC Frame Boundary Detection Using Iterative S-Parameter Updates

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Solution Overview

Problem

Existing methods for determining forward error correction (FEC) frame boundaries in high-speed communication links, such as those using RS and BCH codes, are inefficient, requiring excessive time and resources due to the need for redundant alignment markers or extensive data block checking.

Innovation Solution

A method and apparatus that determine an FEC frame boundary by calculating s parameter values for consecutive data blocks, using iterative items derived from initial and subsequent data blocks, to quickly identify frame boundaries within received data, thereby reducing the time and resources required for synchronization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If alignment markers are periodically added to data stream to determine FEC frame boundary, then frame boundary detection can be implemented, but redundant information increases, circuit resources are consumed, and bit rate increases

Engineering Contradiction:
Improveframe boundary detection capabilityVSAvoidredundant information
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts and removes the alignment markers from the data stream, achieving frame boundary detection without adding redundant information. The method uses the existing data structure and FEC code properties to identify frame boundaries, eliminating the need for separate alignment markers while maintaining detection capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent makes the FEC decoding process serve multiple functions: it simultaneously performs error correction and frame boundary detection. By using the FEC code structure itself for both purposes, the system eliminates the need for separate alignment markers, reducing redundant information while maintaining reliable frame boundary detection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Quantity of substance

If alignment markers are inserted with increased time interval to control redundant information, then redundant information is reduced, but frame boundary determination consumes more time

Engineering Contradiction:
Improveredundant informationVSAvoidframe boundary determination time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent enables the FEC decoding process to self-service frame boundary detection. The same decoding logic that corrects errors also identifies frame boundaries by detecting valid FEC frame structures, eliminating the need for separate alignment markers and their associated timing constraints. This self-service approach reduces both redundant information and determination time.

Inventive Principle:
Principle #25Self-service

3Quantity of substance

If logic circuit searches data stream using FEC code property to determine frame boundary, then no additional redundant information is needed, but in worst case N data blocks need to be checked consuming 2×N×N symbols reception time

Engineering Contradiction:
Improveredundant informationVSAvoidframe boundary determination time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent performs preliminary validation checks on FEC frame candidates before full decoding. By using quick validation criteria based on FEC code properties to filter out invalid candidates early in the process, the system reduces the average number of full decodings needed, significantly decreasing determination time while maintaining the zero-redundancy advantage.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a two-stage detection process: first performing partial validation using FEC code properties to quickly identify potential frame boundaries, then performing full decoding only on candidates that pass the preliminary check. This partial action approach reduces the average computational burden from checking all N data blocks to checking only a fraction, dramatically improving detection speed.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10116419B2Method and apparatus for determining forward error correction frame boundary, and decoding system
Publication Date: 2018.10.30 HUAWEI TECH CO LTD
  • US10116419B2 patent drawing
  • US10116419B2 patent drawing
  • US10116419B2 patent drawing

AI summary

The present embodiments provide a method and an apparatus for determining a frame boundary of an FEC frame, and a decoding system. The method includes receiving data, where the data includes N+P consecutive symbols, N consecutive symbols constitute a first data block, and N consecutive symbols constitute a second data block; obtaining s parameter values corresponding to the first data block. The method also includes determining a first iterative item and a second iterative item and determining, according to the s parameter values corresponding to the first data block, s parameter values corresponding to the second data block. Additionally, the method includes determining, according to the s parameter values corresponding to the second data block, whether the second symbol is a frame boundary of an FEC frame.