ITO Slit Design for Display Panel Disclination Control
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Solution Overview
Problem
Liquid crystal display panels face issues with disclination lines caused by lateral electrical fields around through holes in the array substrate, leading to reduced transmission rates and potential Mura effects, which increase costs.
Innovation Solution
Incorporating a slit between the ITO thin film and the through hole, with a length and width greater than 2.5 microns, to weaken the lateral electrical field and prevent disclination lines, while ensuring electrical connectivity via a thin film transistor and passivating layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a through hole is used to electrically connect the ITO thin film to the metallic layer, then electrical connectivity is achieved, but lateral electrical fields are generated around the edges of the through hole causing disclination lines
Solution Approach 1:
An insulating layer is introduced as an intermediary between the ITO thin film and the through hole. This insulating layer prevents the direct formation of lateral electrical fields at the interface while maintaining electrical connectivity through the through hole to the metallic layer below, thus resolving the contradiction between achieving electrical connectivity and avoiding harmful lateral electrical fields
2Reliability
If the through hole is made larger to ensure electrical connectivity, then connectivity is improved, but the disclination lines become more prominent causing Mura effect
Solution Approach 1:
The insulating layer acts as a mediator that allows the through hole to be sufficiently large for reliable electrical connectivity while preventing the formation of strong lateral electrical fields that would otherwise occur at the edges of larger through holes, thus avoiding the Mura effect
3Device complexity
If no insulating layer is used, then the structure is simpler, but disclination lines form around the through hole reducing transmission rate
Solution Approach 1:
The insulating layer is positioned strategically between the ITO thin film and the through hole to prevent disclination line formation. This minimal addition of structural complexity effectively resolves the transmission rate issue without significantly complicating the overall device structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the occurrence of disclination lines, thereby enhancing display performance and avoiding the Mura effect, leading to improved transmission rates and cost efficiency.
Implementation Method 1
The through hole may result in a lateral electrical field around edges of the through hole. The lateral electrical field drives the liquid crystal at the lateral sides to overlap with the liquid crystal in the central portion to form disclination lines.
Data Source
AI summary
An array substrate and a display panel are disclosed. The array substrate includes at least one data line, at least one scanning line, and a pixel cell defined by the data line and the scanning line. The pixel cell includes an ITO thin film and at least one metallic layer below the ITO thin film. The ITO thin film electrically connects to the metallic layer via a through hole. The ITO thin film includes a slit arranged between the ITO thin film and the through hole, and the slit is arranged to avoid the disclination lines so as to improve the display performance.