Non-volatile Memory IVC Driver Dynamic Control
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Solution Overview
Problem
Existing non-volatile memory devices consume unnecessary current due to the constant operation of internal voltage control (IVC) drivers for all memory array tiles, even when not all tiles are actively operating, which increases power consumption and reduces efficiency as data input/output speed increases.
Innovation Solution
A non-volatile memory device that selectively turns on IVC drivers based on the address counted during input/output operations, allowing only the necessary memory regions to convert external power supply voltage into internal operating voltage, thereby reducing current consumption and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If IVC drivers are turned on for all MATs regardless of operation status, then all memory regions can operate simultaneously, but current consumption increases unnecessarily
Solution Approach 1:
The patent implements dynamic control of IVC driver activation based on real-time operation status of memory array tiles. The control logic circuit selectively activates only those IVC drivers corresponding to MATs that are currently performing input/output operations, while keeping others deactivated. This dynamic adaptation resolves the contradiction by ensuring full productivity when needed while minimizing current consumption during partial operation.
Solution Approach 2:
The patent applies local quality by differentiating the operational state of individual memory array tiles and applying corresponding control to their associated IVC drivers. Each IVC driver's activation state is locally optimized based on whether its corresponding MAT is actively operating, rather than applying a uniform activation state to all drivers. This localized control resolves the contradiction by matching resource activation to actual operational needs.
2Productivity
If the number of IVC drivers is increased to handle higher data throughput, then data input/output speed improves, but current consumption increases
Solution Approach 1:
The patent implements dynamic scaling of active IVC drivers based on the number of MATs currently performing operations. When data throughput requirements increase and more MATs are activated, the system dynamically enables additional IVC drivers. Conversely, when fewer MATs are operating, the system reduces the number of active IVC drivers. This dynamic adjustment resolves the contradiction by ensuring that energy loss is minimized while maintaining the necessary productivity level.
Solution Approach 2:
The patent applies partial action by activating only the necessary number of IVC drivers required to handle the current data throughput demand, rather than keeping all available drivers active. The control logic circuit determines the optimal subset of IVC drivers to activate based on which MATs are currently operating, enabling partial utilization of the IVC driver resources. This resolves the contradiction by avoiding excessive current consumption while maintaining sufficient productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach minimizes current consumption during data input/output operations by selectively activating IVC drivers only when needed, enhancing the overall performance and efficiency of the memory device.
Implementation Method 1
converting an external power supply voltage into an internal operating voltage for operation of each of the plurality of first memory cells and the plurality of second memory cells according to whether each of the plurality of first analog circuits and the plurality of second analog circuits are turned on or off
Data Source
AI summary
A non-volatile memory device includes a first and a second memory regions including first and second memory cells and first and second analog circuits, respectively; a control logic circuit determining on/off states of the analog circuits, and converting an external power supply voltage into an internal operating voltage for operation of each of the memory cells; and input/output circuit selecting an input/output memory region for performing input/output of data using the internal operating voltage, wherein input/output of data for the first and second memory cells are sequentially performed, and at least one of the each of the first and second analog circuits are turned on together while the input/output of data for the first memory cells is performed.