IWR Digital Pixel Calibration via Capacitance Ratio Evaluation
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Solution Overview
Problem
Existing imaging devices with IWR type pixels face challenges in accurately calibrating fixed spatial noise due to dispersions in pixel parameters, particularly in the context of 'Integrate While Read' mode, where integration and reading phases occur simultaneously, and require improved methods to evaluate capacitance ratios and residual voltages for precise measurement.
Innovation Solution
The implementation of a reading circuit with a storage switch and coupling transistor allows for the evaluation of the capacitance ratio between integration and storage capacitors, enabling improved calibration by accounting for compression effects and pixel-to-pixel differences in capacitance values, using a control circuit to manage reset transistors and switches during measurement cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of moving object
If IWR mode is used to maximize integration time, then signal capture capability is improved, but measurement precision deteriorates due to simultaneous integration and reading phases
Solution Approach 1:
The patent segments the measurement process into multiple phases: a first phase to evaluate capacitance ratio (Cint/Cmem) by resetting both capacitors and measuring residual voltage, and a second phase for normal operation. This temporal segmentation allows accurate calibration without interfering with the simultaneous integration-reading operation, resolving the contradiction between extended integration time and measurement precision.
Solution Approach 2:
The patent performs preliminary calibration measurements during a dedicated first phase before normal operation begins. By pre-evaluating the capacitance ratio and storing this calibration data, the system enables accurate measurements during the second phase without requiring additional time during the simultaneous integration-reading operation, thus maintaining both extended integration time and measurement precision.
2Device complexity
If capacitance ratio is not evaluated, then device complexity is reduced, but calibration accuracy deteriorates due to pixel-to-pixel parameter dispersions
Solution Approach 1:
The patent makes the reading circuit multi-functional by adding a storage capacitor (Cmem) that serves dual purposes: it stores residual voltage for capacitance ratio evaluation during calibration, and it functions as part of the normal IWR operation circuitry. This universal approach enables accurate pixel-specific calibration without adding separate dedicated calibration hardware, thus improving calibration accuracy while limiting the increase in device complexity.
Solution Approach 2:
The system performs self-calibration by using its own internal components (integration capacitor, storage capacitor, reset transistors, and reading circuitry) to evaluate the capacitance ratio without requiring external calibration equipment. The residual voltage measurement technique allows the pixel to self-characterize its parameters, improving calibration accuracy while avoiding the complexity of external calibration systems.
3Ease of operation
If reset transistors are always on, then ease of operation is improved, but loss of energy increases due to continuous resetting
Solution Approach 1:
The patent implements periodic resetting of the integration capacitor through the re-loop mechanism that triggers reset pulses based on the voltage across the integration capacitor reaching a threshold. The storage capacitor is reset during the calibration phase and then held at a fixed voltage. This periodic action ensures the system is ready for the next measurement without requiring continuous resetting, thus reducing energy loss while maintaining ease of operation through automatic trigger-based resetting.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the calibration of IWR pixels by accurately evaluating capacitance ratios and residual voltages, leading to improved measurement precision and reduced noise, effectively addressing the limitations of existing calibration methods in IWR mode.
Implementation Method 1
each pixel being equipped with a photodetector, for example a photodiode or a phototransistor, used to convert electromagnetic radiation into an electrical signal
Implementation Method 2
integrating a current Id from the photodetector by charging or discharging an integration capacitor
Data Source
Figure 1~2
Figure 3
Figure 4~5
AI summary
Imager pixel formed of a photodetector (102) connected to a readout circuit (110) comprising: - an integration capacitor (CINT), - a reset transistor (Mr1) of the integration capacitor (CINT), - a coupling transistor between the photodetector (102) and the integration capacitor (CINT), - a storage capacitor (CMEM), - a second reset transistor (Mr2) of the storage capacitor (CMEM), - a storage switch (121) between the integration capacitor (CINT) and the storage capacitor (CMEM), to allow different configurations corresponding to different phases of evaluation of pixel parameters and in particular of a ratio R= Cint/Cmem.