Jammer Circuitry for Side-Channel Attack Mitigation
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Solution Overview
Problem
The increasing number of hardware attacks, particularly side-channel attacks, on System on Chip (SoC) devices that process sensitive data poses a significant threat to storage systems, as attackers can exploit information leakage through physical parameters like power consumption and electromagnetic radiation.
Innovation Solution
Incorporating a jammer circuitry within the cryptographic engine to generate noise, which decreases the signal-to-noise ratio, making it difficult for attackers to derive information from the processing of secure data by adding randomly generated noise to the cryptographic algorithms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If cryptographic algorithms process sensitive data in SoC devices, then data security is improved, but side-channel attacks can exploit information leakage through physical parameters
Solution Approach 1:
The patent applies the 'Blessing in disguise' principle by converting the harmful side-channel leakage into a beneficial masking effect. The jammer circuitry generates noise that mimics the physical characteristics of cryptographic processing, thereby masking the actual sensitive data processing signals and preventing attackers from extracting information through side-channel analysis
Solution Approach 2:
The patent implements the 'Intermediary' principle by introducing a jammer circuitry as an intermediary component between the cryptographic processing units and the external environment. This intermediary generates and injects noise signals that interfere with side-channel attacks, acting as a mediator that protects the sensitive data processing while allowing normal cryptographic operations to proceed
2Object-affected harmful factors
If jammer circuitry generates noise to mask cryptographic signals, then resistance to side-channel attacks is improved, but device complexity increases
Solution Approach 1:
The patent applies the 'Merging' principle by integrating the jammer circuitry directly within the cryptographic engine structure. The noise generation functionality is combined with the existing cryptographic processing units, allowing the jammer to share physical resources and control logic with the cryptographic operations, thereby minimizing the increase in overall device complexity
Solution Approach 2:
The patent implements the 'Universality' principle by designing the jammer circuitry to serve multiple functions: it generates noise signals, modulates them to match cryptographic processing characteristics, and injects them into the appropriate channels. This multi-functional design reduces the need for separate dedicated components for each function, thereby limiting the complexity increase
Data Source
AI summary
An apparatus to facilitate mitigation of side-channel attacks in a computer system platform is disclosed. The apparatus comprises a cryptographic circuitry, including a plurality of crypto functional units (CFUs) to perform cryptographic algorithms; and jammer circuitry to generate noise to protect the plurality of CFUs from side-channel attacks.