High Voltage Switch Circuit Using JFET Biasing
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Solution Overview
Problem
Traditional switch circuits for controlling high voltage sources suffer from significant power loss due to the use of high resistance resistors, which are not suitable for integration into circuits, necessitating a high efficiency solution for on/off switching.
Innovation Solution
A switch circuit incorporating a JFET transistor, a resistive device, and two transistors, where the resistive device provides a bias voltage to turn on the JFET and first transistors, and a control signal manages the second transistor to turn off the high voltage source, utilizing negative biasing and feedback to minimize power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If a high resistance resistor is used to reduce power loss, then power consumption is reduced, but the resistor cannot be integrated into an integrated circuit
Solution Approach 1:
The patent changes the resistance parameter from high resistance (several mega ohms) to low resistance by using a transistor as a variable resistor. The transistor's drain-source resistance is controlled by the gate voltage, allowing it to provide the necessary bias current while maintaining compatibility with integrated circuit manufacturing processes.
Solution Approach 2:
The patent replaces the physical resistor component with an electronic equivalent - a transistor operating in its linear region. This substitution allows the circuit to achieve the same biasing function without requiring a discrete high-value resistor that cannot be fabricated using standard integrated circuit processes.
2Ease of operation
If a transistor is used to control the high voltage source, then switching capability is improved, but significant power loss occurs due to the bias resistor
Solution Approach 1:
The patent changes the resistance parameter from high resistance to low resistance by using a transistor as a variable resistor. The transistor's drain-source resistance is controlled by the gate voltage, allowing it to provide the necessary bias current while maintaining compatibility with integrated circuit manufacturing processes.
Solution Approach 2:
The transistor Q2 provides self-regulating bias control through its gate-source voltage. When the transistor is turned on, the gate-source voltage automatically adjusts to maintain the appropriate bias current, eliminating the need for an external high-value resistor and reducing power loss.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces power loss and allows integration into circuits by effectively managing the switching of high voltage sources with minimal current flow when the first transistor is off, making it suitable for integrated circuit implementation.
Implementation Method 1
A JFET transistor, a resistive device, a first transistor and a second transistor are provided. The JFET transistor is coupled to an input of a high voltage source
Implementation Method 2
The resistive device is coupled to the JFET transistor and the first transistor to provide a bias voltage to turn on the JFET transistor and the first transistor
Data Source
AI summary
A switch circuit to control a high voltage source is presented. It includes a JFET transistor, a resistive device, a first transistor and a second transistor. The JFET transistor is coupled to the high voltage source. The first transistor is connected in serial with the JFET transistor to output a voltage in response to the high voltage source. The second transistor is coupled to control the first transistor and the JFET transistor in response to a control signal. The resistive device is coupled to the JFET transistor and the first transistor to provide a bias voltage to turn on the JFET transistor and the first transistor when the second transistor is turned off. Once the second transistor is turned on, the first transistor is turned off and the JFET transistor is negative biased.


